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IMX7DCEC Datasheet(PDF) 74 Page - NXP Semiconductors |
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IMX7DCEC Datasheet(HTML) 74 Page - NXP Semiconductors |
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74 / 161 page  Electrical characteristics i.MX 7Dual Family of Applications Processors Datasheet, Rev. 7, 09/2023 NXP Semiconductors 74 Figure 33. Command Latch cycle timing diagram Figure 34. Address Latch cycle timing diagram Figure 35. Write Data Latch cycle timing diagram Figure 36. Read Data Latch cycle timing diagram (Non-EDO Mode) Command NF8 NF9 NF7 NF6 NF5 NF2 NF1 NF3 NF4 Address NF10 NF11 NF9 NF8 NF7 NF6 NF5 NF1 NF3 NAND_DATAxx Data to NF NF10 NF11 NF7 NF6 NF5 NF1 NF3 NF9 NF8 Data from NF NF14 NF15 NF17 NF16 NF12 NF13 |
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