Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

33889 Datasheet(PDF) 51 Page - Freescale Semiconductor, Inc

Part # 33889
Description  System Basis Chip with Low Speed Fault Tolerant CAN Interface
PDF  60 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33889 Datasheet(HTML) 51 Page - Freescale Semiconductor, Inc

Back Button 33889 Datasheet HTML 47Page - Freescale Semiconductor, Inc 33889 Datasheet HTML 48Page - Freescale Semiconductor, Inc 33889 Datasheet HTML 49Page - Freescale Semiconductor, Inc 33889 Datasheet HTML 50Page - Freescale Semiconductor, Inc 33889 Datasheet HTML 51Page - Freescale Semiconductor, Inc 33889 Datasheet HTML 52Page - Freescale Semiconductor, Inc 33889 Datasheet HTML 53Page - Freescale Semiconductor, Inc 33889 Datasheet HTML 54Page - Freescale Semiconductor, Inc 33889 Datasheet HTML 55Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 51 / 60 page
background image
Analog Integrated Circuit Device Data
Freescale Semiconductor
51
33889
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 31. INTR register
Table 32. Control bits:
When the mask bit has been set, INT pin goes low if the appropriate condition occurs.
LX2HS1
HS1AUTO
Wake-up inputs supplied by HS1
Autotiming HS1
X
0
off
X
1
On, HS1 cyclic, period defined in TIM2 register
0
X
no
1
X
Yes, LX inputs sensed at sampling point
Bit
Description
FWU
If this bit is set, and the SBC is turned into sleep or stop mode, the SBC wakes up after the time selected in the
TIM2 register
IDDS
Bit = 0: IDDS-WU1 selected (lowest value, typ 3.5mA)
Bit = 1: IDDS-WU2 selected (highest value, typ 14mA)
INTR
D3
D2
D1
D0
$111b
W
VSUPLOW
HS1OT-V2LOW
VDDTEMP
CANF
R
VSUPLOW
HS1OT
VDDTEMP
CANF
Reset
0
0
0
0
Reset condition
POR, RESET
POR, RESET
POR, RESET
POR, RESET
Control bit
Description
CANF
Mask bit for CAN failures (OR of any CAN failure)
VDDTEMP
Mask bit for VDD medium temperature
HS1OT-V2LOW
Mask bit for HS1 over temperature OR V2 below 4V
VSUPLOW
Mask bit for SUP below 6.1V



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com