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56F8335 Datasheet(PDF) 36 Page - Freescale Semiconductor, Inc

Part # 56F8335
Description  16-bit Digital Signal Controller
PDF  160 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

56F8335 Datasheet(HTML) 36 Page - Freescale Semiconductor, Inc

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56F8335 Technical Data, Rev. 5
36
Freescale Semiconductor
Preliminary
4.2 Program Map
The Program memory map is located in Table 4-4. The operating mode control bits (MA and MB) in the
Operating Mode Register (OMR) control the Program memory map. At reset, these bits are set as indicated
in Table 4-2.
EXT_BOOT = EMI_MODE = 0 and cannot be changed in the 56F8335 or 56F8135.
After reset, the OMR MA bit can be changed and will have an effect on the P-space memory map, as shown
in Table 4-3. Changing the OMR MB bit will have no effect.
Data Flash
8KB
—
Erase / Program via Flash interface unit and word writes to
CDBW. Data Flash can be read via either CDBR or XDB2,
but not by both simultaneously
Program RAM
4KB
—
None
Data RAM
8KB
8KB
None
Program Boot Flash
8KB
8KB
Erase / Program via Flash Interface unit and word writes to
CDBW
Table 4-2 OMR MB/MA Value at Reset1
1. Information in shaded areas not applicable to 56F8335/56F8135.
OMR MB =
Flash Secured
State2,3
2. This bit is only configured at reset. If the Flash secured state changes, this will not be reflected in MB until the next reset.
3. Changing MB in software will not affect Flash memory security.
OMR MA =
EXTBOOT Pin
Chip Operating Mode
0
0
Mode 0 – Internal Boot; EMI is configured to use 16 address lines; Flash
Memory is secured; external P-space is not allowed; the EOnCE is disabled
0
1
Not valid; cannot boot externally if the Flash is secured and will actually
configure to 00 state
1
0
Mode 0 – Internal Boot; EMI is configured to use 16 address lines
1
1
Mode 1 – External Boot; Flash Memory is not secured; EMI configuration is
determined by the state of the EMI_MODE pin
Table 4-3 Changing OMR MA Value During Normal Operation
OMR MA
Chip Operating Mode
0
Use internal P-space memory map configuration
11
Use external P-space memory map configuration – If MB = 0 at reset, changing this bit has no effect.
Table 4-1 Chip Memory Configurations
On-Chip Memory
56F8335
56F8135
Use Restrictions



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