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56F8335 Datasheet(PDF) 79 Page - Freescale Semiconductor, Inc |
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56F8335 Datasheet(HTML) 79 Page - Freescale Semiconductor, Inc |
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79 / 160 page  Register Descriptions 56F8335 Technical Data, Rev. 5 Freescale Semiconductor 79 Preliminary 5.6.3.5 Low Voltage Detector Interrupt Priority Level (LVI IPL)—Bits 7–6 This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2. It is disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 5.6.3.6 Reserved—Bits 5–4 This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing. 5.6.3.7 External IRQ B Interrupt Priority Level (IRQB IPL)—Bits 3–2 This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2. It is disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 5.6.3.8 External IRQ A Interrupt Priority Level (IRQA IPL)—Bits 1–0 This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2. It is disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 5.6.4 Interrupt Priority Register 3 (IPR3) Figure 5-6 Interrupt Priority Register 3 (IPR3) Base + $3 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read GPIOD IPL GPIOE IPL GPIOF IPL FCMSGBUF IPL FCWKUP IPL FCERR IPL FCBOFF IPL 0 0 Write RESET 000 0 0 0 0 0 0 0 0 0 0 0 0 0 |
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