56F8335 datasheet(6/160 Pages) FREESCALE

6 / 160 page

56F8335 Technical Data, Rev. 5

Freescale Semiconductor

Preliminary

1.1.3

Memory

Note: Features in italics are NOT available in the 56F8135 device.

•

Harvard architecture permits as many as three simultaneous accesses to program and data memory

•

Flash security protection feature

•

On-chip memory, including a low-cost, high-volume Flash solution

— 64KB of Program Flash

— 4KB of Program RAM

— 8KB of Data Flash

—8KB of Data RAM

— 8KB of Boot Flash

•

EEPROM emulation capability

1.1.4

Peripheral Circuits

Note: Features in italics are NOT available in the 56F8135 device.

•

Pulse Width Modulator module:

— In the 56F8335, two Pulse Width Modulator modules, each with six PWM outputs, three Current Sense

inputs, and four Fault inputs; fault-tolerant design with dead time insertion; supports both center-aligned

and edge-aligned modes

— In the 56F8135, one Pulse Width Modulator module with six PWM outputs, three Current Sense inputs

and three Fault inputs; fault-tolerant design with dead time insertion; supports both center-aligned and

edge-aligned modes

•

Four 12-bit, Analog-to-Digital Converters (ADCs), which support four simultaneous conversions with

quad, 4-pin multiplexed inputs; ADC and PWM modules can be synchronized through Timer C, channels

2 and 3

•

Quadrature Decoder:

— In the 56F8335, two four-input Quadrature Decoders or two additional Quad Timers

— In the 56F8135, one four-input Quadrature Decoder, which works in conjunction with Quad Timer A

•

Temperature Sensor can be connected, on the board, to any of the ADC inputs to monitor the on-chip

temperature

•Quad Timer:

— In the 56F8335, four dedicated general-purpose Quad Timers totaling six dedicated pins: Timer C with

two pins and Timer D with four pins

— In the 56F8135, two Quad Timers; Timer A and Timer C both work in conjunction with GPIO

•

Optional On-Chip Regulator

•

FlexCAN (CAN Version 2.0 B-compliant) module with 2-pin port for transmit and receive

•

Two Serial Communication Interfaces (SCIs), each with two pins (or four additional GPIO lines)

•

Up to two Serial Peripheral Interfaces (SPIs), both with configurable 4-pin port (or eight additional GPIO

lines); SPI 1 can also be used as Quadrature Decoder 1 or Quad Timer B

•

Computer Operating Properly (COP)/Watchdog timer

•

Two dedicated external interrupt pins

56F8335 Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc

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