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MPC5200B Datasheet(PDF) 51 Page - Freescale Semiconductor, Inc

Part # MPC5200B
Description  SDRAM/DDR Memory Controller
PDF  78 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5200B Datasheet(HTML) 51 Page - Freescale Semiconductor, Inc

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Electrical and Thermal Characteristics
MPC5200B Data Sheet, Rev. 1
Freescale Semiconductor
51
Figure 37. Timing Diagram — 8,16, 24, and 32-bit CODEC / I2S Master Mode
NOTE
Output timing is specified at a nominal 50 pF load.
Table 43. Timing Specifications — 8,16, 24, and 32-bit CODEC / I2S Slave Mode
Sym
Description
Min
Typ
Max
Units
SpecID
1
Bit Clock cycle time
40.0
—
—
ns
A15.9
2
Clock duty cycle
—
50
—
%(1)
NOTES:
1
Bit Clock cycle time
A15.10
3
FrameSync setup time
1.0
—
—
ns
A15.11
4
Output Data valid after clock edge
—
—
14.0
ns
A15.12
5
Input Data setup time
1.0
—
—
ns
A15.13
6
Input Data hold time
1.0
—
—
ns
A15.14
BitClk
5
3
4
3
4
(CLKPOL=0)
BitClk
(CLKPOL=1)
FrameSync
(SyncPol = 1)
TxD
Output
Output
Output
6
7
8
Output
FrameSync
(SyncPol = 0)
Output
RxD
Input
1
22



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