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M24256E-FDW6TP Datasheet(PDF) 27 Page - STMicroelectronics |
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M24256E-FDW6TP Datasheet(HTML) 27 Page - STMicroelectronics |
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27 / 46 page ![]() Table 12. Cycling performance by groups of four bytes Symbol Parameter Test condition Max. Unit Ncycle Write cycle endurance(1) TA ≤ 25 °C, VCC(min) < VCC < VCC(max) 4 000 000 Write cycles(2) TA = 85°C, VCC(min) < VCC < VCC(max) 1 200 000 1. The write cycle endurance is defined by characterization and qualification. For devices embedding the ECC functionality, the write cycle endurance is defined for group of four bytes located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3] where N is an integer. 2. A write cycle is executed when either a write CDA register, a page write, a byte write , a write identification page or a lock identification page instruction is decoded. When using the byte write, the page write or the write identification page, refer also to Section 6.1.3 ECC (error correction code) and write cycling. Table 13. Memory cell data retention Parameter Test condition Min. Unit Data retention (1) TA = 55 °C 200 Year 1. The data retention behaviour is checked in production, while the data retention limit defined in this table is extracted from characterization and qualification results. M24256E-F DC and AC parameters DS12687 - Rev 3 page 27/46 |
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