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A89505GESSR Datasheet(PDF) 3 Page - Allegro MicroSystems

Part # A89505GESSR
Description  Full-Bridge PWM Gate Driver
PDF  13 Pages
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A89505GESSR Datasheet(HTML) 3 Page - Allegro MicroSystems

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Full-Bridge PWM Gate Driver
A89505
3
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Terminal List Table
Name
Number
Function
ES Package LP Package
ISET
1
8
Terminal to set gate drive current
SLEEPn
2
9
Standby input, active low
SENSE
3
10
Sense resistor connection, low-side gate return
GLB
4
11
Gate driver
GLA
5
12
Gate driver
GHB
6
13
Gate driver
SB
7
14
High-side bridge reference
GHA
8
15
Gate driver
SA
9
16
High-side bridge reference
VCP
10
17
Charge pump reservoir cap connection
CP2
11
18
Charge pump terminal
VBB
12
19
Supply voltage
CP1
13
20
Charge pump terminal
GND
14
1
Ground
AIOUT
15
2
Analog output proportional to VSENSE
OCLn
16
3
OCP and OVP output flag, open drain
VREF
17
4
Analog OCP reference input
IN2
18
5
Digital IN2 input
IN1
19
6
Digital IN1 input
RC
20
7
Terminal to set blank- and off-time
PAD
–
–
1
2
3
4
5
11
12
13
14
15
ISET
SLEEPn
SENSE
GLB
GLA
CP2
VBB
CP1
GND
PAD
AIOUT
Package ES, 20-Pin QFN Pinouts
1
2
3
4
5
11
12
13
14
15
6
7
8
9
10
16
17
18
19
20
ISET
SLEEPn
SENSE
GLB
GLA
GHB
SB
GHA
SA
PAD
VCP
CP2
VBB
CP1
GND
AIOUT
OCLn
VREF
IN2
IN1
RC
Package LP, 20-Pin eTSSOP Pinouts



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