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A89505GESSR Datasheet(PDF) 1 Page - Allegro MicroSystems |
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A89505GESSR Datasheet(HTML) 1 Page - Allegro MicroSystems |
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1 / 13 page ![]() Designed for pulse-width-modulated (PWM) control of DC motors, the A89505 is capable of 50 V operation and provides gate drive for an all N-channel external MOSFET bridge. Input terminals are provided for use in controlling the speed and direction of a DC motor with externally applied PWM control signals. Internal synchronous rectification control circuitry is provided to lower power dissipation during PWM operation. Internal circuit protection includes VDS protection, thermal shutdown with hysteresis, undervoltage monitoring of VBB, and crossover-current protection. TheA89505 is supplied in a low-profile 4 mm × 4 mm, 20-contact QFN package (suffix “ES”) and a 20-lead eTSSOP (suffix “LP”), both with exposed thermal pad. A89505-DS, Rev. 4 MCO-0001098 • Standard IN1/IN2 control logic • Overcurrent indication • Adjustable off-time and blank-time • Adjustable current limit • Adjustable gate drive • Synchronous rectification • Internal UVLO • Crossover-current protection • MOSFET VDS protection • Voltage output proportional to load current • AEC-Q100 qualified Full-Bridge PWM Gate Driver PACKAGES: Functional Block Diagram Not to scale A89505 CHARGE PUMP VREG UVLO TSD ISET RC SLEEPn IN1 IN2 STANDBY Control Logic VCP GATE DRIVE VCP VBB GHA GHB SB SA OCLn AIOUTHOLD VREF ×10 ÷10 OCL Filter + – GLA GLB SENSE GND System Controller optional 0.1 µF 0.1 µF VIN GHA SA GLA R SENSE Inrush current limit = V/10 * R REF SENSE optional reverse-battery protection FEATURES AND BENEFITS DESCRIPTION 20-Pin QFN (suffix “ES”) with Exposed Thermal Pad 20-Pin eTSSOP (suffix “LP”) with Exposed Thermal Pad August 8, 2022 |
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