TDA6402 datasheet(29/40 Pages) PHILIPS

29 / 40 page

2000 Jan 24

Philips Semiconductors

Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners

TDA6402; TDA6402A;

TDA6403; TDA6403A

Table 26 Two status bytes acquisition

Notes

1. XX = Read status byte.

2. X = No acknowledge from the master means end of sequence.

Other I2C-bus addresses may be selected by applying an appropriate voltage to the CE input.

Examples of 3-wire bus sequences (SW = OPEN)

Table 27 18-bit sequence (fOSC = 800 MHz; PUHF = ON)

The reference divider is automatically set to 512 assuming that RSB has been set to logic 1 at power-on. If RSB has been

set to logic 0, in a previous 27-bit sequence, the reference divider will still be set at 640. In that event, the 18-bit sequence

has to be adapted to the 640 divider ratio.

Table 28 19-bit sequence (fOSC = 650 MHz; PUHF = ON)

The reference divider is automatically set to 512 assuming that RSB has been set to logic 1 at power-on. If RSB has been

set to logic 0 in a previous 27-bit sequence, the reference divider will still be set at 640. In that event, the 19-bit sequence

has to be adapted to the 640 divider ratio.

Table 29 27-bit sequence (fOSC = 750 MHz; PUHF = ON; N = 640; ICP =60 µA; no test function)

Table 30 19-bit sequence

This sequence will program fOSC to 600 MHz in 50 kHz steps; ICP remains at 60 µA.

Table 31 18-bit sequence

This sequence will program fOSC to 600 MHz in 50 kHz steps; ICP remains at 60 µA.

SC3A

XX(1)

AXX(1)

X(2)

100011001000000000

1000010100010100000

100001110101001100010001000

1000010111011100000

100010111011100000

TDA6402 Datasheet(PDF) 29 Page - NXP Semiconductors