SCF5249VM140 datasheet(24/56 Pages) FREESCALE

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SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3

Signal Descriptions

Freescale Semiconductor

8.16 Queued Serial Peripheral Interface (QSPI)

NOTE

The QSPI interface is a high-speed serial interface allowing transmit and

receive of serial data.

8.17 Crystal Trim

The XTRIM_GPIO38 output produces a pulse-density modulated phase/frequency difference signal to be

used after low-pass filtering to control varicap-voltage to control crystal oscillation frequency. This will

lock the crystal to the incoming digital audio signal.

8.18 Clock Out

The MCLK1/GPO39 and /MCLK2/GPO42 can serve as general purpose I/Os or as DAC clock outputs.

When programmed as DAC clock outputs, these signals are directly derived from the crystal.

8.19 Debug and Test Signals

These signals interface with external I/O to provide processor status signals.

8.19.1 Test Mode

The TEST[3:0] inputs are used for various manufacturing and debug tests. For normal mode these inputs

should be always be tied low. Use TEST0 to switch between background debug mode and JTAG mode.

Drive TEST0 high for debug mode.

8.19.2 High Impedance

The assertion of HI_Z will force all output drivers to a high-impedance state. The timing on HI_Z is

independent of the clock.

Table 13. Queued Serial Peripheral Interface (QSPI) Signals

Serial Module Signal

Description

SCL_QSPICLK

Multiplexed signal IIC interface clock or QSPI clock output

Function select is done via PLLCR register.

SDA_QSPIDIN

Multiplexed signal IIC interface data or QSPI data input.

Function select is done via PLLCR register.

QSPIDOUT_GPIO26

QSPI data output

QSPICS0_GPIO29

4 different QSPI chip selects

QSPICS1_GPIO24

QSPICS2_GPIO21

QSPICS3_GPIO22

SCF5249VM140 Datasheet(PDF) 24 Page - Freescale Semiconductor, Inc