SCF5249VM140 datasheet(13/56 Pages) FREESCALE

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Signal Descriptions

SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3

Freescale Semiconductor

Signal Descriptions

8.1

Introduction

This section describes the SCF5249 input and output signals. The signal descriptions as shown in Table 4

are grouped according to relevant functionality.

Table 3. SCF5249 Documentation

Document Name

Description

Order Number

CFPRM/D

ColdFire Family Programmer’s Reference Manual

CFPRM/D

ColdFire2UM

Version 2/2M ColdFire Core

Processor User’s Manual

ColdFire2UM/D

ColdFire2UMAD

Version 2/2M ColdFire Core

Processor User’s Manual Addendum

ColdFire2UMAD/D

SCF5249UM

SCF5249 User’s Manual

SCF5249UM/D

Table 4. SCF5249 Signal Index

Signal Name

Mnemonic

Function

Input/

Output

Reset

State

Address

A[23:1]

A[25]/GPO8

23 address lines, address line 25

multiplexed with gpo8.

Out

Read-write control

RW_b

Bus write enable - indicates if read or

write cycle in progress

Out

Output enable

Output enable for asynchronous

memories connected to chip selects

Out

negated

Data

D[31:16]

Data bus used to transfer word data

In/Out

Hi-Z

Synchronous row address

strobe

SDRAS

Row address strobe for external

SDRAM.

Out

negated

Synchronous column

address strobe

SDCAS

Column address strobe for external

SDRAM

Out

negated

SDRAM write enable

SDWE

Write enable for external SDRAM

Out

negated

SDRAM upper byte

enable

SDUDQM

Indicates during write cycle if high

byte is written

Out

SDRAM lower byte enable SDLDQM

Indicates during write cycle if low byte

is written

Out

SDRAM chip selects

SDRAMCS1

SDRAM chip select

Outt

negated

SDRAM chip selects

SDRAMCS2/GPIO7

SDRAM chip select

In/Out

negated

SDRAM clock enable

BCLKE

SDRAM clock enable

Out

System clock

SCLK/GPIO10

SDRAM clock output

In/Out

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