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CP2201 Datasheet(PDF) 75 Page - Silicon Laboratories |
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CP2201 Datasheet(HTML) 75 Page - Silicon Laboratories |
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75 / 108 page ![]() CP2200/1 Rev. 1.0 75 13.3. Flash Access Registers The CP2200 Flash is accessed through the registers in Table 17. See the register tables following Table 17 for detailed register descriptions Register 59. FLASHSTA: Flash Status Register Table 19. Flash Access Register Summary Register Long Name Address Description FLASHSTA Flash Status 0x7B Used to determine the status of a Flash write or erase operation. FLASHKEY Flash Lock and Key 0x67 Write-only register allowing the host to unlock the Flash for writing or erasing. FLASHADDRH FLASHADDRL Flash Address Register High and Low Bytes 0x69 0x68 16-bit Address used for Flash operations. FLASHDATA Flash Read/Write Data Register 0x06 Data register used for writing or reading a single byte of Flash. FLASHAUTORD Flash AutoRead Data Register 0x05 Data register used for reading a block of sequential data stored in Flash. Each read from this register increments the Flash address register by 1. FLASHERASE Flash Erase 0x6A Initiates a Flash erase operation. Note: To determine when a Flash operation completes, the FLBUSY bit should be polled or software should wait for the Flash Write/Erase Operation Complete Interrupt to occur. Bits 7–4: UNUSED. Read = 0000b, Write = don’t care. Bit 3: FLBUSY: FLASH Busy Indicator This bit indicates when a FLASH write or erase operation is in progress. 0: FLASH is idle. 1: FLASH write/erase operation is currently in progress. Bit 2: Reserved. Bit 1: FLWRITE: FLASH Write 0: The last Flash operation completed was not a Flash write. 1: The last Flash operation completed was a Flash write. Bit 0: FLERASE: FLASH Erase 0: The last Flash operation completed was not a Flash erase. 1: The last Flash operation completed was a Flash erase. R/W R/W R/W R/W R R R R Reset Value — — — — FLBUSY Reserved FLWRITE FLERASE 00000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Address: 0x7B |
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