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CP2201 Datasheet(PDF) 84 Page - Silicon Laboratories

Part # CP2201
Description  SINGLE-CHIP ETHERNET CONTROLLER
PDF  108 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

CP2201 Datasheet(HTML) 84 Page - Silicon Laboratories

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CP2200/1
84
Rev. 1.0
Indirect Register 3. IPGT: Back-to-Back Inter-Packet Gap Register
Indirect Register 4. IPGR: Non-Back-to-Back Inter-Packet Gap Register
Bits 15–7:Reserved. Read = 000000000b; Must write 000000000b.
Bits 6–0: IPGT: Back-to-Back Inter-Packet Gap Register
Sets the minimum delay between the end of any transmitted packet and the start of a new packet.
In Full-Duplex mode, the register value should be set to the desired number of time units (each time
unit is 0.46 µs) minus 3. The recommended setting is 0x15 (21d), which yields 9.6 µs.
In Half-Duplex mode, the register value should be set to the desired number of time units (each time
unit is 0.46 µs) minus 6. The recommended setting is 0x12 (18d), which yields 9.6 µs.
R/WR/W
R/WR/W
R/WR/W
R/W
R/W
Reserved
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default Value
Reserved
IPGT
0x0000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
MACADDR:
0x02
Bit 15:
Reserved. Read = 0b; Must write 0b.
Bits 14–8:IPGR1: Non-Back-to-Back Inter-Packet Gap Part 1
Sets the optional carrier sense window referenced in IEEE 802.3 Section 4.2.3.2.1. The range of
values for this bit field are 0x00 to IPGR2. The recommended value is 0x0C.
Bit 7:
Reserved. Read = 0b; Must write 0b.
Bits 6–0: IPGR2: Non-Back-to-Back Inter-Packet Gap Part 2
Sets the Non-Back-to-Back Inter-Packet Gap. The recommended value is 0x12, which represents a
minimum inter-packet gap of 9.6 µs.
R/WR/W
R/WR/W
R/WR/W
R/W
R/W
Reserved
IPGR1
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default Value
Reserved
IPGR2
0x0000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
MACADDR:
0x03



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