HT49CV3 datasheet(8/44 Pages) HOLTEK

8 / 44 page

HT49RV3/HT49CV3

Rev. 1.30

March 20, 2007

Stack Register

- STACK

The stack register is a special part of the memory used

to save the contents of the Program Counter. The stack

is organized into 6 levels and is neither part of the data

nor part of the program, and is neither readable nor

writeable. Its activated level is indexed by a stack

pointer (SP) and is neither readable nor writeable. At the

start of a subroutine call or an interrupt acknowledg-

ment, the contents of the Program Counter is pushed

onto the stack. At the end of the subroutine or interrupt

routine, signaled by a return instruction (RET or RETI),

the contents of the Program Counter is restored to its

previous value from the stack. After a chip reset, the SP

will point to the top of the stack.

If the stack is full and a non-masked interrupt takes

place, the interrupt request flag is recorded but the ac-

knowledgment is still inhibited. Once the SP is decre-

mented (by RET or RETI), the interrupt is serviced. This

feature prevents stack overflow, allowing the program-

mer to use the structure easily. Likewise, if the stack is

full, and a

²CALL² is subsequently executed, a stack

overflow occurs and the first entry is lost (only the most

recent 6 return addresses are stored).

Data Memory

- RAM

The data memory (RAM) has a capacity of 130

´8 bits,

and is divided into two functional groups, namely; spe-

cial function registers (34

´8 bit) and general purpose

data memory (RAM bank contains 96

´8 bits) most of

which are readable/writeable, but some are read only.

The special function registers are overlapped in any

banks.

The special function registers consist of an Indirect ad-

dressing register 0 (00H), a Memory pointer register 0

(MP0;01H), an Indirect addressing register 1 (02H), a

Memory pointer register 1 (MP1;03H), a Bank pointer

(BP;04H), an Accumulator (ACC;05H), a Program coun-

ter lower-order byte register (PCL;06H), a Table pointer

(TBLP;07H), a Table higher-order byte register

(TBLH;08H), a Real time clock control register

(RTCC;09H), a Status register (STATUS;0AH), an Inter-

rupt control register 0 (INTC0;0BH), a Timer/Event

Counter 0 (TMR0H:0CH; TMR0L:0DH), a Timer/Event

Counter 0 control register (TMR0C;0EH), a Timer/Event

Counter 1 (TMR1H:0FH;TMR1L:10H), a Timer/Event

Counter 1 control register (TMR1C; 11H), Interrupt con-

trol register 1 (INTC1;1EH), Serial Bus control register

(SBCR;1FH), Serial Bus data register (SBDR; 20H), Re-

mote timer control register (RMTC;21H), Remote con-

trol capture register 0 (RMT0;22H), Remote control

capture register 1 (RMT1;23H), Multi-function interrupt

Status register (MFIS;29H), VFD control register

(VFDC; 28H), I/O registers (PA;12H, PB;14H, PC;16H,

PD;18H) and I/O control registers (PAC;13H, PBC;15H,

PCC;17H, PDC;19H).

The remaining space before 40H is reserved for future

expansion usage and reading these locations will return

the result

²00H². The space before 40H overlaps in

each bank. The general-purpose data memory, ad-

dressed from 40H to 9FH, is used for data and control

information under instruction commands.

S p e c i a l P u r p o s e

D a t a M e m o r y

0 0 H

0 1 H

0 2 H

0 3 H

0 4 H

0 5 H

0 6 H

0 7 H

0 8 H

0 9 H

0 A H

0 B H

0 C H

0 D H

0 E H

0 F H

1 0 H

1 1 H

1 2 H

1 3 H

1 4 H

1 5 H

1 6 H

1 7 H

1 8 H

1 9 H

1 A H

1 B H

1 C H

1 D H

1 E H

1 F H

2 0 H

2 1 H

2 2 H

2 3 H

2 4 H

2 5 H

2 6 H

2 7 H

2 8 H

2 9 H

3 0 H

3 F H

I n d i r e c t A d d r e s s i n g R e g i s t e r 0

M P 0

I n d i r e c t A d d r e s s i n g R e g i s t e r 1

M P 1

B P

A C C

P C L

T B L P

T B L H

R T C C

S T A T U S

I N T C 0

T M R 0 H

T M R 0 L

T M R 0 C

T M R 1 H

T M R 1 L

T M R 1 C

P A

P A C

P B

P B C

P C

P C C

P D

P D C

P W M 0

P W M 1

P W M 2

P W M 3

I N T C 1

S B C R

S B D R

R M T C

R M T 0

R M T 1

A D R

A D C R

A C S R

V F D C

M F I S

: U n u s e d

R e a d a s " 0 0 "

9 F H

4 0 H

G e n e r a l P u r p o s e

D a t a M e m o r y

( 9 6 B y t e s )

RAM Mapping

HT49CV3 Datasheet(PDF) 8 Page - Holtek Semiconductor Inc

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