HT49CV3 datasheet(14/44 Pages) HOLTEK

14 / 44 page

HT49RV3/HT49CV3

Rev. 1.30

March 20, 2007

Power Down Operation

- HALT

The HALT mode is initialized by the

²HALT² instruction

and results in the following.

· The system oscillator turns off but the WDT oscillator

keeps running (if the WDT oscillator or the real time

clock is selected).

· The contents of the on-chip RAM and of the registers

remain unchanged.

· The WDT is cleared and starts recounting (if the WDT

clock source is from the WDT oscillator or the real time

clock oscillator).

· All I/O ports maintain their original status.

· The PDF flag is set but the TO flag is cleared.

· The VFD driver keeps running (if the RTC OSC is se-

lected).

The system can leave the HALT mode by means of an

external reset, an interrupt, an external falling edge sig-

nal on port A, an external rising/falling edge on the RMT

pin, or a WDT overflow. An external reset will initialize a

chip reset and a WDT overflow will initialize a

²warm re-

set

². After examining the TO and PDF flags, the source

of the reset can be determined. The PDF flag is cleared

by a system power-up or by executing the

²CLR WDT²

instruction, and is set by executing the

²HALT² instruc-

tion. The TO flag is set if a WDT time-out occurs, and

causes a wake-up that only resets the Program Counter

and SP, the other flags remain in their original status.

The port A wake-up and interrupt methods can be con-

sidered as a continuation of normal execution. Each bit

in port A can be independently selected to wake-up the

device by options. Awakening from an I/O port stimulus,

the program will resume execution at the next instruc-

tion. If the system is woken up via an interrupt, two pos-

sibilities may occur. If the related interrupt is disabled or

the interrupt is enabled but the stack is full, the program

will resume execution at the next instruction. But if the

interrupt is enabled and the stack is not full, a regular in-

terrupt response takes place.

If an interrupt request flag is set to

²1² before entering

the

²HALT² mode, the wake-up function of the related in-

terrupt will be disabled.

If a wake-up event occurs, it takes 1024 tSYS (system

clock period) to resume normal operation. In other

words, a dummy period will be inserted after a wake-up.

If the wake-up results from an interrupt acknowledge

signal, the actual interrupt subroutine execution will be

delayed by one or more cycles. However, if the wake-up

results in the next instruction execution, this will be exe-

cuted immediately after the dummy period is finished.

To minimize power consumption, all the I/O pins should

be carefully managed before entering the HALT mode.

Reset

There are three ways in which a microcontroller reset

can occur, through events occurring both internally and

externally:

· RES is reset during normal operation

· RES is reset during HALT

· WDT time-out is reset during normal operation

The WDT time-out reset during HALT is a little different

from other kinds of reset. Most of the conditions remain

unchanged except that the Program Counter and Stack

Pointer will be cleared to 0 and the TO flag will be set to

1. Most registers are reset to the

²initial condition² once

the reset conditions are met.

The different types of resets described affect the reset

flags in different ways. These flags, the PDF and TO

flags, are located in the status register and are con-

trolled by various microcontroller operations such as the

HALT function or Watchdog Timer. The reset flags are

shown in the table:

PDF

RESET Conditions

RES reset during power-up

RES reset during normal operation

RES Wake-up HALT

WDT time-out during normal operation

WDT Wake-up HALT

Note:

²u² stands for unchanged

The RTCC register descriptions are listed below.

Bit No.

Label

Read/

Write

Reset

Function

0~2

RT0~

RT2

R/W

8 to 1 multiplexer control inputs to select the real time clock prescaler

output

3, 5~7

¾¾¾

Unused bit, read as

²0²

QOSC

R/W

32768Hz OSC quick start-up oscillating

0/1: quick/slow start

RTCC (09H) Register

D i v i d e r

f S

8 t o 1 M u x .

P r e s c a l e r

R T 2

R T 1

R T 0

R T C I n t e r r u p t

f S / 2 8 ~ f S / 2 1 5

Real Time Clock

HT49CV3 Datasheet(PDF) 14 Page - Holtek Semiconductor Inc

HT49CV3 Datasheet(HTML) 14 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

Datasheet Download

Link URL