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PIC16F84AT-20/SSROM Datasheet(PDF) 27 Page - Microchip Technology |
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PIC16F84AT-20/SSROM Datasheet(HTML) 27 Page - Microchip Technology |
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27 / 88 page  © 2001 Microchip Technology Inc. DS35007B-page 25 PIC16F84A TABLE 6-4: RESET CONDITIONS FOR ALL REGISTERS Register Address Power-on Reset MCLR during: – normal operation – SLEEP WDT Reset during normal operation Wake-up from SLEEP: – through interrupt – through WDT Time-out W — xxxx xxxx uuuu uuuu uuuu uuuu INDF 00h ---- ---- ---- ---- ---- ---- TMR0 01h xxxx xxxx uuuu uuuu uuuu uuuu PCL 02h 0000 0000 0000 0000 PC + 1(2) STATUS 03h 0001 1xxx 000q quuu(3) uuuq quuu(3) FSR 04h xxxx xxxx uuuu uuuu uuuu uuuu PORTA (4) 05h ---x xxxx ---u uuuu ---u uuuu PORTB (5) 06h xxxx xxxx uuuu uuuu uuuu uuuu EEDATA 08h xxxx xxxx uuuu uuuu uuuu uuuu EEADR 09h xxxx xxxx uuuu uuuu uuuu uuuu PCLATH 0Ah ---0 0000 ---0 0000 ---u uuuu INTCON 0Bh 0000 000x 0000 000u uuuu uuuu(1) INDF 80h ---- ---- ---- ---- ---- ---- OPTION_REG 81h 1111 1111 1111 1111 uuuu uuuu PCL 82h 0000 0000 0000 0000 PC + 1(2) STATUS 83h 0001 1xxx 000q quuu(3) uuuq quuu(3) FSR 84h xxxx xxxx uuuu uuuu uuuu uuuu TRISA 85h ---1 1111 ---1 1111 ---u uuuu TRISB 86h 1111 1111 1111 1111 uuuu uuuu EECON1 88h ---0 x000 ---0 q000 ---0 uuuu EECON2 89h ---- ---- ---- ---- ---- ---- PCLATH 8Ah ---0 0000 ---0 0000 ---u uuuu INTCON 8Bh 0000 000x 0000 000u uuuu uuuu(1) Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0', q = value depends on condition Note 1: One or more bits in INTCON will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: Table 6-3 lists the RESET value for each specific condition. 4: On any device RESET, these pins are configured as inputs. 5: This is the value that will be in the port output latch. |
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