PIC16F84AT-20SLASHSSROM datasheet(80/88 Pages) MICROCHIP

80 / 88 page

PIC16F84A

DS35007B-page 78

APPENDIX C:

MIGRATION FROM

BASELINE TO

MID-RANGE DEVICES

This section discusses how to migrate from a baseline

device (i.e., PIC16C5X) to a mid-range device (i.e.,

PIC16CXXX).

The following is the list of feature improvements over

the PIC16C5X microcontroller family:

Instruction word length is increased to 14-bits.

This allows larger page sizes, both in program

memory (2K now as opposed to 512K before)

and the register file (128 bytes now versus

32 bytes before).

A PC latch register (PCLATH) is added to han-

dle program memory paging. PA2, PA1 and PA0

bits are removed from the STATUS register and

placed in the OPTION register.

Data memory paging is redefined slightly. The

STATUS register is modified.

Four new

instructions

have been added:

RETURN

, RETFIE, ADDLW, and SUBLW. Two

instructions, TRIS and OPTION, are being

phased

out,

although

they

are

kept

for

compatibility with PIC16C5X.

OPTION

and

TRIS

registers

are

made

addressable.

Interrupt capability is added. Interrupt vector is

at 0004h.

Stack size is increased to eight-deep.

RESET vector is changed to 0000h.

RESET of all registers is revisited. Five different

RESET (and wake-up) types are recognized.

Registers are reset differently.

10. Wake-up from SLEEP through interrupt is

added.

11. Two separate timers, the Oscillator Start-up

Timer (OST) and Power-up Timer (PWRT), are

included for more reliable power-up. These

timers

are

invoked

selectively

avoid

unnecessary delays on power-up and wake-up.

12. PORTB has weak pull-ups and interrupt-on-

change features.

13. T0CKI pin is also a port pin (RA4/T0CKI).

14. FSR is a full 8-bit register.

15. "In system programming" is made possible. The

user can program PIC16CXX devices using only

five pins: VDD, VSS, VPP, RB6 (clock) and RB7

(data in/out).

To convert code written for PIC16C5X to PIC16F84A,

the user should take the following steps:

Remove any program memory page select

operations (PA2, PA1, PA0 bits) for CALL, GOTO.

Revisit any computed jump operations (write to

PC or add to PC, etc.) to make sure page bits

are set properly under the new scheme.

Eliminate any data memory page switching.

Redefine data variables for reallocation.

Verify all writes to STATUS, OPTION, and FSR

registers since these have changed.

Change RESET vector to 0000h.

PIC16F84AT-20/SSROM Datasheet(PDF) 80 Page - Microchip Technology

PIC16F84AT-20/SSROM Datasheet(HTML) 80 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

Datasheet Download

Link URL