ACT88430 datasheet(59/74 Pages) QORVO

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Data Sheet Rev. G, August 2021 | Subject to change without notice

59 of 74

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ACT88430

Advanced PMU for Microcontrollers and Solid State Drive Applications

nRESET is triggered from all output’s internal POK signals with a 998us delay.

nRESET_AUX1

The nRESET_AUX1 is triggered all outputs’ internal POK signals with a 1989us delay.

nRESET_AUX2

The nRESET_AUX2 pin is configured to go low when the IC enters SLEEP mode.

EXT_PG

EXT_PG is the DVS control input for Buck3. When EXT_PG = L, the VSET0 register controls the Buck3 converter

output voltage to 1.5V. When EXT_PG = H the VSET1 register controls the Buck3 converter output voltage to 1.35V.

MODE

The MODE pin must be connected to AGND.

GPIO

GPIO is the DVS control input for Buck4. When GPIO = L, the VSET1 register controls the Buck4 converter output

voltage to 1.8V. When GPIO = H the VSET0 register controls the Buck4 converter output voltage to 1.2V.

Buck1/2/3 Voltage Setting

Buck1/3 reference voltage is 0.8V. This sets the allowable voltage range between 0.8V to 3.988V in 12.5mV steps.

Buck2 reference voltage is 0.6V. This sets the allowable voltage range between 0.6V to 3.000V in 9.375mV steps.

LDO1 Voltage Setting

LDO1 is configured as an LDO with CMI109. It can be configured between 2.0V to 3.575V in 25mV steps.

LDO2 Voltage Setting

The LDO2 reference voltage is 0.6V. This sets the allowable voltage range between 0.8V to 2.375V in 25mV steps.

LDO3 Voltage Setting

The LDO2 reference voltage is 0.8V. This sets the allowable voltage range between 2.0V to 3.575V in 25mV steps.

Device ID

The CMI 109 Device ID (register 0x7Dh) = 0x09h

I2C Address

The CMI 109 7-bit I2C address is 0x5Ah. This results in 0xB4h for a write address and 0xB5h for a read address.

ACT88430 Datasheet(PDF) 59 Page - Qorvo, Inc