AD4080BBCZ datasheet(2/94 Pages) AD

2 / 94 page

Data Sheet

AD4080

TABLE OF CONTENTS

analog.com

Rev. A | 2 of 94

Features................................................................ 1

Applications........................................................... 1

Functional Block Diagram......................................1

General Description...............................................1

Specifications........................................................ 3

Timing Specifications......................................... 6

Absolute Maximum Ratings...................................8

Thermal Resistance........................................... 8

Electrostatic Discharge (ESD) Ratings...............8

ESD Caution.......................................................8

Pin Configuration and Function Descriptions........ 9

Typical Performance Characteristics................... 12

Terminology......................................................... 17

Theory of Operation.............................................18

Product Overview............................................. 18

Converter Operation.........................................18

Transfer Function............................................. 19

Easy Drive Analog Inputs ................................ 19

Reference Buffer and Common-Mode Output..22

Power Supplies................................................ 22

Internally Regulated Supply Configuration....... 23

Externally Generated Supply Configuration..... 23

Power-On Reset (POR) Monitor.......................23

Power Supply Sequence..................................24

Power Saving Operating Modes.......................25

Software Reset.................................................27

Applications Information...................................... 28

Typical Applications Diagrams......................... 28

Analog Front End Design................................. 29

Reference Circuitry Design.............................. 30

Data Interface Clocking Solution...................... 30

Power Solution................................................. 31

Digital Interface....................................................32

Overview.......................................................... 32

SPI Configuration Interface.............................. 32

LVDS Data Interface.........................................44

SPI Data Interface............................................50

GPIO Pins........................................................ 51

Digital Features................................................... 53

Overview.......................................................... 53

Event Detection................................................53

Result FIFO...................................................... 55

Digital Filter...................................................... 63

System Error Correction Coefficients............... 70

Layout Guidelines................................................71

Configuration Registers....................................... 72

Outline Dimensions............................................. 94

Ordering Guide.................................................94

Evaluation Boards............................................ 94

REVISION HISTORY

9/2024—Rev. 0 to Rev. A

Changes to Table 1..........................................................................................................................................3

Changes to Table 2..........................................................................................................................................6

Changes to Table 5..........................................................................................................................................8

Changes to Figure 2 and Table 6.....................................................................................................................9

Changes to Figure 9 and Figure 10............................................................................................................... 13

Changes to Figure 17 Caption, Figure 18 Caption, and Figure 19 Caption...................................................14

Added Figure 30; Renumbered Sequentially................................................................................................. 16

Changes to Power Saving Operating Modes Section....................................................................................25

Changes to Figure 44 and Figure 45............................................................................................................. 28

Changes to Event Trigger Capture Mode, Read All FIFO, Figure 92, and Figure 93.................................... 62

Changes to Table 28......................................................................................................................................63

Changes to Filter Synchronization Section and Figure 97.............................................................................66

Changes to Figure 102 and Figure 103......................................................................................................... 69

Change to Layout Guidelines Section............................................................................................................71

Change to Table 36........................................................................................................................................76

Changes to FIFO Watermark Register Section and Table 56........................................................................90

3/2024—Revision 0: Initial Version

AD4080BBCZ Datasheet(PDF) 2 Page - Analog Devices

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