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TDA8026ET/C2 Datasheet(PDF) 13 Page - NXP Semiconductors |
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TDA8026ET/C2 Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 61 page ![]() TDA8026_1 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 1.1 — 30 June 2016 13 of 61 NXP Semiconductors TDA8026 Multiple smart card slot interface IC Remark: Refer to the Application note AN10724 for further information. 8.3.3 VDD(INTREGD) voltage supervisor without external divider on PORADJ pin An alarm signal is triggered and the analog controller resets the TDA8026 when: • VDD(INTREGD) is less than Vth on pin VDD(INTREGD) • Pin PORADJ monitoring VDD(INTF) is less than Vth The alarm is reset and the TDA8026 leaves reset mode 8 ms after VDD and VPORADJ are above their respective Vth + Vhys. Vth on VDD(INTF) is set as shown in Equation 1: (1) Thus Vbg = 1.21 V (see Figure 6). In reset mode, the TDA8026 is inactive and does not respond to any external command lines. Fig 8. VDD(INTF) voltage supervisor 001aal089 twake twake Vth + Vhys Vth power-up supply drop VDD(INTF) VDD(INTREGD) ALARMN (internal signal) device ready for activation device ready for activation V th V bg 1 R2 R1 ------- + = |
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