TDA8026ETSLASHC2 datasheet(41/61 Pages) NXP

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TDA8026_1

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Product data sheet

Rev. 1.1 — 30 June 2016

41 of 61

NXP Semiconductors

TDA8026

Multiple smart card slot interface IC

11. Characteristics

[1]

fclk(ext) is the external clock frequency applied to pins CLKIN1 and CLKIN2.

[2]

Refer to Section 8.6 for further information about DC-to-DC converter operation.

[3]

See Figure 6 “The voltage supervisor circuit” on page 12.

[4]

See Section 8.3.2 “Description” for a description of the voltage supervisor.

[5]

Typical value measurement based on a 85 % DC-to-DC converter and inductance efficiency; depends on

PCB layout and external component quality (inductor, capacitor).

[6]

Maximum measurement value based on a 125 mA ICC current load and a 75 % DC-to-DC converter and

inductance efficiency; depends on PCB layout and external component quality (inductor, capacitor).

Table 42.

Supply

VDD = VDD(INTF) = 3.3 V; fclk(ext)[1] = 10 MHz; GND = 0 V; inductor = 10 H; decoupling capacitors on

pins VDD and VUP = 10 F; Tamb = 25 C unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max Unit

VDD

supply voltage

on pin VDD; DC-to-DC converter on

[2] 2.7

5.5

on pin VDD; DC-to-DC converter off;

VCC(n) pins = 5 V

[2] 5.25 -

5.5

Vhys

hysteresis

voltage

on pin VDD

[3] 50

100

150

VDD(INTF) interface supply

voltage

on pin VDD(INTF)

1.6

3.6

Vth

threshold voltage decreasing voltage on pin VDD

[3] 2.35 2.45 2.55 V

on pin VDD(INTF)

[4] 1.19 1.26 1.32 V

IDD

supply current

shutdown mode

A

Standby mode

300

450

A

clock-stop mode; All card slots in this

mode; fclk(ext) = stopped on pins

CLKIN1 and CLKIN2

3.7

active mode; All VCC(n) pins = 5 V;

fclk(ext) = 5 MHz;

ICC(1) = ICC(2) = 55 mA;

ICC(3) = ICC(4) = ICC(5) = 2 mA

[5]

[6]

210

260

IDD(INTF)

interface supply

current

shutdown mode

A

active mode; All VCC(n) pins = 5 V;

fclk(ext) = 5 MHz;

A

increasing voltage on pin VDD

[3] 2.35 2.55 2.65 V

twake

wake-up time

5.8

Table 43.

Supply supervisor

VDD = VDD(INTF) = 3.3 V; fclk(ext) = 10 MHz; GND = 0 V; inductor = 10 H; decoupling capacitors on

pins VDD and VUP = 10 F; Tamb = 25 C unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

PORADJ Pin

leakage current

1

A

IIL

LOW-level input current

1

A

IIH

HIGH-level input

current

1

A

TDA8026ET/C2 Datasheet(PDF) 41 Page - NXP Semiconductors

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