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TDA8026ET/C2 Datasheet(PDF) 6 Page - NXP Semiconductors |
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TDA8026ET/C2 Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 61 page ![]() TDA8026_1 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 1.1 — 30 June 2016 6 of 61 NXP Semiconductors TDA8026 Multiple smart card slot interface IC 7. Pinning information 7.1 Pinning [1] The numbers in subscript and between brackets “(n)” indicate the relevant card slot. [2] The ball positions are those when the TDA8026 is viewed from the top. Fig 2. TDA8026 pin configuration for the TFBGA64 package Table 3. TDA8026 ball map Ball position[1][2] 1 2 3 4 5 6 7 8 A TST2 TST1 TESTMODE VDD(INTF) SDWNN VDD(INTREGD) VDD PORADJ B STAP3 SCL CLKIN2 GND1 VCC(5) RST(5) CLK(5) DCDC_OFF C STAP4 SDA CLKIN1 I/OUC1 I/OUC2 CLK(4) I/O(5) GNDS D STAP5 INTAUXN GND2 GND3 GND4 RST(4) I/O(4) VCC(4) E A0 IRQN I/O(1) GND5 GND6 CLK(3) I/O(3) VCC(3) F C8(1) CLK(1) GND7 GND8 GND9 RST(3) I/O(2) PRES(2) G C4(1) RST(1) VCC(1) GNDP VCC(2) RST(2) CLK(2) GNDC(2) H SPRES PRES(1) GNDC(1) LX VUP n.c. INHIB GND10 001aal084 TDA8026 Transparent top view H G F D B E C A 2468 1357 ball A1 index area |
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