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TDA8026ET/C2 Datasheet(PDF) 7 Page - NXP Semiconductors

Part # TDA8026ET/C2
Description  Multiple smart card slot interface IC
PDF  61 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

TDA8026ET/C2 Datasheet(HTML) 7 Page - NXP Semiconductors

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TDA8026_1
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 1.1 — 30 June 2016
7 of 61
NXP Semiconductors
TDA8026
Multiple smart card slot interface IC
7.2 Pin description
Table 4.
Pin description
Symbol
Pin
Type[1]
Supply
power
Description
IRQN
E2
O
VDD(INTF)
microcontroller interrupt; active LOW; open-drain
INTAUXN
D2
I
VDD(INTF) auxiliary interrupt line input:
auxiliary contact reader front end not connected:
connect INTAUXN pad to supply voltage VDD(INTF)
auxiliary contact reader front end connected: connect
INTAUXN pad to an external 10 k
 pull-up resistor;
active LOW
SDWNN
A5
I[3]
VDD(INTF) shutdown and reset input; active LOW
VDD(INTF)
A4
P
VDD(INTF)
microcontroller interface supply voltage
SDA
C2
I/O
VDD(INTF) serial data line to and from the I2C-bus master;
open-drain
SCL
B2
I
VDD(INTF) serial clock line from the I2C-bus master
A0
E1
C
VDD(INTF) I2C-bus address configuration and selection
SPRES
H1
C
VDD(INTF) PRES mode[2] configuration and selection
CLKIN1
C3
I
VDD(INTF) card slot 1 external clock input; connect external clock
(fclk(ext)) to generate the CLK(1) frequency
CLKIN2
B3
I
VDD(INTF) card slots 2 to 5 external clock input; connect external
clock (fclk(ext)) to generate the CLK(2) to CLK(5)
frequency
GND1
B4
G
-
ground connection
I/OUC1
C4
I/O[3]
VDD(INTF) card slot 1 microcontroller data input and output
I/OUC2
C5
I/O[3]
VDD(INTF) card slots 2 to 5 microcontroller data input and output
VCC(1)
G3
P
VCC(1)
card slot 1 card supply; position C1
RST(1)
G2
O
VCC(1)
card slot 1 card reset output; position C2
CLK(1)
F2
O
VCC(1)
card slot 1 card clock output; provides fCLK; position C3
C4(1)
G1
I/O[4]
VCC(1)
card slot 1 auxiliary input and output; position C4
C8(1)
F1
I/O[4]
VCC(1)
card slot 1 auxiliary input and output; position C8
I/O(1)
E3
I/O[4]
VCC(1)
card slot 1 card input and output; position C7
GNDC(1)
H3
G
-
card slot 1 card ground signal; position C5
PRES(1)
H2
I
VDD(INTF) card slot 1 card presence input
VCC(2)
G5
P
VCC(2)
card slot 2 card supply; position C1
RST(2)
G6
O
VCC(2)
card slot 2 card reset; position C2
CLK(2)
G7
O
VCC(2)
card slot 2 card clock output; provides fCLK; position C3
I/O(2)
F7
I/O[4]
VCC(2)
card slot 2 card input and output; position C7
GNDC(2)
G8
G
-
card slot 2 card signal ground; position C5
PRES(2)
F8
I
VDD(INTF) card slot 2 card presence input
GNDS
C8
G
-
card slots 3 to 5 card signal ground; position C5
VCC(3)
E8
P
VCC(3)
card slot 3 card supply; position C1
RST(3)
F6
O
VCC(3)
card slot 3 card reset output; position C2
CLK(3)
E6
O
VCC(3)
card slot 3 card clock output; provides fCLK; position C3
I/O(3)
E7
I/O[4]
VCC(3)
card slot 3 card input and output; position C7



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