TMS470MF06607 datasheet(60/65 Pages) TI2

60 / 65 page

TMS470MF06607

SPNS157C

– JANUARY 2012

www.ti.com

Revision History

This data sheet revision history highlights the technical changes made to the device or the datasheet.

Date

Additions, Deletions, And Modifications

Revision

October 2010

Updated the MibADC Input Equivalent Circuit illustration.

Renamed f(PLLDIV) to f(RCLK).

Fixed the formulas in SPI timing, including item 4,5,8,9,10 in master mode, and item 1,2,3 and

footnotes in slave mode.

Removed slew rate control description, renamed low EMI buffer to adaptive impedance 4 mA

buffer.

Swapped DCAN1 and DCAN0 RAM Map.

Removed VIH of PORRST pin from section 5.1 RST and PORRST timings. Changed the

footnotes in the Electrical characterization section so that the VIH of general IO pins also applies

to PORRST pin.

Added a new section "Terms and Acronyms".

August 2011

Fixed the Device ID in .

Added descriptions for the ENZ pin.

January 2012

Added maximum programming time specifications to Flash Timings table.

Added note to clarify application use and qualification methodology of EEPROM emulation bank

in Flash Timings table.

Revision History

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TMS470MF06607 Datasheet(PDF) 60 Page - Texas Instruments