V

V

V

V

N

V

Vds

OUT

PS

IN

127

20

5

.

3

265

2

2

max

max

u

:

|

!

m

A

mV

Rdson

7

2

/

14

50

24

UCC24612

SLUSCM5A – AUGUST 2017 – REVISED FEBRUARY 2018

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Typical Application (continued)

8.2.1 Design Requirements

Table 2. 60-W DCM Flyback Design Requirements

PARAMETER

TEST CONDITIONS

MIN

NOM

MAX

UNIT

INPUT CHARACTERISTICS

VIN

Input voltage

85

265

VRMS

OUTPUT CHARACTERISTICS

VOUT

Output voltage, average

VIN = 85 VRMS to 265 VRMS, IOUT = 0 A to 3 A

19

20

21

V

IOUT

Output current

VIN = 85 VRMS to 265 VRMS

0

3

A

8.2.2 Detailed Design Procedure

8.2.2.1 SR MOSFET Selection

UCC24612 can be paired with an appropriate MOSFET to replace the diode rectifier on existing designs and

demonstrate significant conduction loss reduction. The SR MOSFET selection should consider the tradeoff

between cost and performance. Lower on-state resistance gives lower conduction loss, while it reduces the

efficiency at light load. Due to the unique implementation of proportional gate drive, the benefit of lower on-state

resistance is diminished. It is recommended to select the MOSFET on-state resistance so that the proportional

gate drive operates for less than 50% of the full load SR conduction time.

According to UCC28740 datasheet, for 3-A output DCM Flyback design, the secondary side peak current should

be about 14 A. To allow the proportional gate drive operating less than 50% of the SR conduction time, SR

MOSFET Rdson should be more than 7 mΩ , according to .

(1)

The MOSFET breakdown voltage should be higher than the maximum voltage the SR MOSFET sees under

maximum input voltage. For this design, the transformer turns ratio is 3.5, the voltage stress on the SR can be

calculated as in Equation 2.

(2)

In this EVM, a 150-V, 19-mΩ MOSFET is used to get a balance between the cost and performance.

8.2.2.2 Bypass Capacitor Selection

UCC24612 needs a sufficient external bypass capacitance to ensure the internal regulator stability. Referring to

the power supply recommendation section, a 2.2-µF 50-V ceramic capacitor was chosen as the bypass capacitor

on REG pin. For the VDD pin, it is normally powered by the output voltage and there is plenty of capacitor there.

A 0.1-µF ceramic capacitor is still recommended to be placed close to the IC to provide high frequency current.

8.2.2.3 Snubber design

It is required for the user to setup snubber components C3 and R3 to get the best performance when using the

UCC24612EVM.

To setup these components will require knowledge of the Flyback transformer secondary leakage inductance

(Lslk) and measuring the secondary resonant ring frequency (fr) in circuit. It is recommended that the SR is not

driven while doing this to simplify the process. It is also recommended to do this test at partial load to avoid

creating too much heat on the SR body diode because the conduction loss is much higher. TP3 should be

disconnected from the Flyback converter to ensure FET Q1 is turned off while setting up the snubber.

The secondary winding capacitance (Cs) then needs to be calculated based on the following equation. Please

note for a transformer with a secondary winding leakage inductance of 3.8 µH and a ring frequency of 2 MHz, the

parasitic capacitance would be 1.7 nF, for example.