TMS320VC33 datasheet(25/53 Pages) TI2

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IACK

ADDR

Data

Fetch IACK

Instruction

IACK Data

Read

Decode IACK

Instruction

td(H1H-IACKL)

td(H1H-IACKH)

Reset or

Interrupt

Vector Read

Fetch First

Instruction of

Service

Routine

INT3 --INT0 Pin

(EDGEMODE = 0)

INT3 --INT0

Flag

ADDR

Data

Vector Address

First Instruction Address

INT3 --INT0 Pin

(EDGEMODE = 1)

tsu(INT-H1L)

(1)

tsu(INT-H1L) (2)

tsu(INT-H1L)

(4)

t w(INT)(3)

th(H1L-INT)

SM320VC33, SMJ320VC33

www.ti.com

SGUS034F – FEBRUARY 2001 – REVISED JUNE 2015

Parameter Measurement Information (continued)

Falling edge of H1 just detects INTx falling edge.

Falling edge of H1 detects second INTx low, however flag clear takes precedence.

Nominal width

Falling edge of H1 misses previous INTx low as INTx rises.

Figure 15. INT3 to INT0 Response Timing

Figure 16. Interrupt Acknowledge (IACK) Timing

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