MP86933

– 16V, INTELLI-PHASE SOLUTION IN TQFN 3X3 PACKAGE

MP86933 Rev.1.2

www.MonolithicPower.com

10

5/26/2021

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OPERATION

The MP86933 is a 12A, monolithic, half-bridge

driver with MOSFETs ideally suited for multi-

phase buck regulators.

Operation begins when VIN, VCC, and VBST

signals are sufficiently high.

Pulse-Width Modulation (PWM)

The PWM input pin is capable of tri-state input.

When the PWM input signal is within the tri-state

threshold window for 50ns, typically (THT or TLT),

the high-side MOSFET (HS-FET) is turned off

immediately, and the low-side MOSFET (LS-

FET) is in diode emulation mode, which is on

until zero-current detection. The tri-state PWM

input can be from a forced middle voltage PWM

signal or made by floating the PWM input, and

the internal current source charges the signal to

a middle voltage. Please refer to the PWM timing

diagram for the propagation delay definition from

PWM to the SW node.

Standby Mode

When SYNC is floating or forced to a middle-

state voltage for 2µs, the MP86933 enters

standby mode. In standby mode, the part shuts

down, and both the CS and VTEMP/FLT outputs

are disabled. The fault latch cannot be reset by

entering standby mode.

Diode Emulation Mode

In diode emulation mode, when PWM is either

low or in a tri-state input, the LS-FET is turned

on whenever the inductor current is positive. The

LS-FET is off if the inductor current crosses the

zero current. Diode emulation mode can be

enabled by pulling SYNC low, driving PWM to

middle state, or floating PWM.

Positive and Negative Inductor Current Limit

When HS-FET over-current is detected for four

consecutive cycles, the HS-FET latches off,

VTEMP/FLT is pulled to 3.3V, and the LS-FET

turns on until zero-current detection. Recycle

VIN/VCC or toggle EN to release the latch and

restart the device.

When the LS-FET detects a -5A current, the

MP86933 turns off the LS-FET for 40ns to limit

the negative current. The LS-

FET’s negative

current limit will not trigger a fault report.

Over-Temperature Protection (OTP)

When the junction temperature reaches the

over-temperature threshold, the HS-FET latches

off, VTEMP/FLT is pulled to 3.3V, and the LS-

FET turns on until zero-current detection.

Temperature

Sense

Output

with

Fault

Indicator (VTEMP/FLT)

VTEMP/FLT is a pin with dual functions.

1) Junction Temperature Sense: VTEMP/FLT is

a voltage output proportional to the junction

temperature whenever VCC is higher than its

UVLO and is in active mode. The gain is

10mV/°C with a -100mV offset at 25°C (i.e.:

0V @ TJ < 10°C, 0.15V @ TJ = 25°C and

0.9V @ TJ = 100°C).

2) Fault Function: When any fault occurs,

VTEMP/FLT is pulled to 3.3V, typically (3.0V

minimum) regardless of the temperature to

report the fault event. VTEMP/FLT monitors

three fault events.

i. Over-Current Limit: To trip the over-

current fault, the current limit must be

exceeded four consecutive times. Once

the fault occurs, the MP86933 latches off

to turn the HS-FET off. The LS-FET is

turned off when the inductor current

reaches zero.

ii. Over-Temperature Fault at TJ > 160°C:

Once the fault occurs, the MP86933

latches off to turn the HS-FET off. The

LS-FET is turned off when the inductor

current reaches zero.

iii. SW to PGND Short: Once the fault

occurs, the MP86933 latches off to turn

the HS-FET off.

The fault latch cannot be reset by entering

standby mode. The fault latch can be

released by recycling either VIN or VCC.