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STM32U073RCT6 Datasheet(PDF) 108 Page - STMicroelectronics |
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STM32U073RCT6 Datasheet(HTML) 108 Page - STMicroelectronics |
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108 / 146 page ![]() Figure 31. SPI timing diagram - slave mode and CPHA = 0 NSS input CPHA=0 CPOL=0 CPHA=0 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tc(SCK) th(NSS) tdis(SO) tsu(NSS) ta(SO) tv(SO) Next bits IN Last bit OUT First bit IN First bit OUT Next bits OUT th(SO) Last bit IN Figure 32. SPI timing diagram - slave mode and CPHA = 1 th(SI) tc(SCK) tw(SCKH) tw(SCKL) tsu(NSS) ta(SO) tv(SO) th(NSS) tdis(SO) tsu(SI) NSS input CPHA=1 CPOL=0 CPHA=1 CPOL=1 MISO output MOSI input First bit OUT Next bits OUT Last bit OUT First bit IN Last bit IN Next bits IN th(SO) 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD. STM32U073x8/B/C Electrical characteristics DS14548 - Rev 2 page 108/146 |
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