L5951 datasheet(9/13 Pages) STMICROELECTRONICS

9 / 13 page

9/13

L5951

BUS TIMING DIAGRAM

Figure 1. BUS Rise and Fall Times

Figure 2. BUS Pulse Width Distortion

Spectral Content Limit

(Measure spectral peak from

0.53MHz to 1.6MHz)

VBAT = 9V to 16V, no ground

offset, 0.53

≤ f ≤ 1MHz.

VBAT = 9V to 16V, no ground

offset, 1

≤ f ≤ 1.67MHz.

100

µV

BUSDLY

Propagation Delay

Measure Delay Between TX Trip

Point and RX Trip Point

µs

TX4XDLY

TXNormDLY

TX to BUS Delay

Measure from 2.5V on TX to

3.875V on BUS

4X Mode

Normal Mode

3.5

14.5

µs

RXLTOHdly

RXHTOLdly

RX Output Delay Time

See Figure 4

Measured from BUS Threshold

Voltage

1.5

1.9

µs

RXLTOH

RXHTOL

RX Output Transition Time

Load RX with 50pF to Ground

See Figure 5

170

RXLTOH

RXHTOL

RX Output Transition Time During

Sleep State

Load RX with 50pF to Ground

See Figure 5, Sleep* = 0VDC

170

ELECTRICAL CHARACTERISTICS (continued)

(Tamb = 25°C, VBAT = 14.4V unless otherwise specified. Standard Loads: IREG1 = 0.5mA, IREG2 = 0.5mA, IREG3 = 5mA)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

µsec

6.25V

BUS

1.5V

trise

tfall

6.25V

1.5V

D99AU993

µsec

6.25V

BUS

1.5V

D99AU994

3.875V

>35

µsec

<93

µsec

L5951 Datasheet(PDF) 9 Page - STMicroelectronics

L5951 Datasheet(HTML) 9 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13

Datasheet Download

Link URL