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HT45F0057 Datasheet(PDF) 32 Page - Holtek Semiconductor Inc |
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HT45F0057 Datasheet(HTML) 32 Page - Holtek Semiconductor Inc |
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32 / 81 page ![]() Rev. 1.30 34 May 17, 2022 Rev. 1.30 35 May 17, 2022 HT45F0057 Induction Cooker Flash MCU HT45F0057 Induction Cooker Flash MCU Port A has the additional capability of providing wake-up functions. When the device is in the Power Down Mode, various methods are available to wake the device up. One of these is a high to low transition of any of the Port A pins. Single or multiple pins on Port A can be setup to have this function. Timer/Event Counters The provision of timers form an important part of any microcontroller, giving the designer a means of carrying out time related functions. The device contains three count-up timer of 8-bit capacity. The Timer/Event Counter 0 has three different operating modes, it can be configured to operate as a general timer, an external event counter or as a pulse width capture device. The Timer/Event Counter 1 has only one operating mode – the PPG non-retriggered function. The Timer/Event Counter 2 has only one operating mode which is timer mode. The provision of an internal prescaler to the clock circuitry on gives added range to the timers. There are two types of registers related to the Timer/Event Counters. The first are the registers that contain the actual value of the timer and into which an initial value can be preloaded. Reading from these registers retrieves the contents of the Timer/Event Counter. The second type of associated registers are the Timer Control Registers which define the timer options and determines how the timers are to be used. Configuring the Timer/Event Counter Input Clock Source For the Timer/Event Counter 0, the clock source can be from an external source or an internal clock source, when selecting an external source, the choice of which is determined by the TMR0ECS bit in the CTRL0 register, it can be from the TMR0 pin or the INT0 signal. For the Timer/Event Counter 1/2, there is only one clock source, fSYS, which is also divided by a prescaler, the division ratio is conditioned by the Timer Control Register bits TnPSC0~TnPSC2. The external clock input allows the user to count external events, measure time internals or pulse widths. While using the internal clock allows the user to generate an accurate time base. • CTRL0 Register Bit 7 6 5 4 3 2 1 0 Name C2VOINV TMR0ECS — — PCKPSC — LVDO LVDC R/W R/W R/W — — R/W — R R/W POR 0 0 — — 0 — 0 0 Bit 7 C2VOINV: Inverting control of the comparator 2 output signal Described elsewhere Bit 6 TMR0ECS: Select TMR0 external clock source 0: TMR0 pin 1: INT0 Bit 5~4 Unimplemented, read as “0” Bit 3 PCKPSC: Peripheral clock prescaler stage Described elsewhere Bit 2 Unimplemented, read as “0” Bit 1 LVDO: Low voltage detector output Described elsewhere Bit 0 LVDC: Low voltage detector control Described elsewhere |
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