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KMB-001LEVALZ Datasheet(PDF) 7 Page - Renesas Technology Corp |
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KMB-001LEVALZ Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 33 page ![]() ISLA224P12 FN7983 Rev.4.01 Page 7 of 32 Apr 8, 2024 Absolute Maximum Ratings Thermal Information AVDD to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to 2.1V OVDD to OVSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to 2.1V AVSS to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V Analog Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V Clock Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V Logic Input to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V Logic Inputs to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V Latchup (Tested per JESD-78C; Class 2, Level A) . . . . . . . . . . . . . . 100mA Thermal Resistance (Typical) JA (°C/W) JC (°C/W) 72 Ld QFN (Notes 3, 4) . . . . . . . . . . . . . . . . 23 0.9 Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 3. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See TB379. 4. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V, TA = -40°C to +85°C (typical specifications at +25°C), AIN = -1dBFS, fSAMPLE = 125MSPS. Boldface limits apply over the operating temperature range, -40°C to +85°C. PARAMETER SYMBOL CONDITIONS ISLA224P12 UNITS MIN (Note 5)TYP MAX (Note 5) DC SPECIFICATIONS (Note 6) Analog Input Full-Scale Analog Input Range VFS Differential 1.95 2.0 2.2 VP-P Input Resistance RIN Differential 600 Input Capacitance CIN Differential 4.5 pF Full Scale Range Temp. Drift AVTC Full Temp 75 ppm/°C Input Offset Voltage VOS -5.0 -1.7 5.0 mV Common-Mode Output Voltage VCM 0.94 V Common-Mode Input Current (per pin) ICM 2.6 µA/MSPS Clock Inputs Inputs Common Mode Voltage 0.9 V CLKP,CLKN Input Swing 1.8 V Power Requirements 1.8V Analog Supply Voltage AVDD 1.7 1.8 1.9 V 1.8V Digital Supply Voltage OVDD 1.7 1.8 1.9 V 1.8V Analog Supply Current IAVDD 293 312 mA 1.8V Digital Supply Current (Note 6)IOVDD 3mA LVDS 75 83 mA Power Supply Rejection Ratio PSRR 30MHz, 50mVP-P signal on AVDD -65 dB Total Power Dissipation Normal Mode PD CMOS 590 mW 2mA LVDS 640 mW 3mA LVDS 662 711 mW Nap Mode PD 77 85 mW Sleep Mode PD CSB at logic high 6 10 mW Nap/Sleep Mode Wakeup Time Sample Clock Running 630 µs |
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