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AM2431BSDGHIALVR. Datasheet(PDF) 83 Page - Texas Instruments |
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AM2431BSDGHIALVR. Datasheet(HTML) 83 Page - Texas Instruments |
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83 / 282 page ![]() The pin can be connected to the same decoupling capacitor that is required for 3.3V operation, it can be left unconnected, or it can be connected to the same 1.8V power source as the respective VDDSHVx pin. (2) This pin must always be connected via a 6.3V or greater, 3.3μF ±20% capacitor to VSS when the SDIO_LDO is being used to source VDDSHV5. The capacitor selected must provide a capacitance within the defined range after it has been derated for DC-bias, operating temperature, and aging effects. Otherwise, this pin may be connected directly to VSS when the VDDA_3P3_SDIO pin is also connected directly to VSS. 5.3.19 PRU_ICSSG MAIN Domain Instances Table 5-64. PRU_ICSSG0 Signal Descriptions SIGNAL NAME [1] SIGNAL TYPE [2] DESCRIPTION [3] ALV/ANI PIN [4] ALX PIN [4] PRG0_ECAP0_IN_APWM_OUT IO PRU_ICSSG0 Enhanced Capture (ECAP) Input or Auxiliary PWM (APWM) Output R2, U5 F3, M4 PRG0_ECAP0_SYNC_IN I PRU_ICSSG0 ECAP Sync Input P5, V5 D1, T1 PRG0_ECAP0_SYNC_OUT O PRU_ICSSG0 ECAP Sync Output AA4, V5 T1, T3 PRG0_IEP0_EDIO_OUTVALID O PRU_ICSSG0 Industrial Ethernet (IEP0) Digital I/O Outvalid C13 B7 PRG0_IEP0_EDC_LATCH_IN0 I PRU_ICSSG0 Industrial Ethernet (IEP0) Distributed Clock Latch Input 0 V1 K4 PRG0_IEP0_EDC_LATCH_IN1 I PRU_ICSSG0 Industrial Ethernet (IEP0) Distributed Clock Latch Input 1 T1 E2 PRG0_IEP0_EDC_SYNC_OUT0 O PRU_ICSSG0 Industrial Ethernet (IEP0) Distributed Clock Sync Output 0 W1 G2 PRG0_IEP0_EDC_SYNC_OUT1 O PRU_ICSSG0 Industrial Ethernet (IEP0) Distributed Clock Sync Output 1 U1 E1 PRG0_IEP0_EDIO_DATA_IN_OUT28 IO PRU_ICSSG0 Industrial Ethernet Digital I/O Data Input/Output W6 Y3 PRG0_IEP0_EDIO_DATA_IN_OUT29 IO PRU_ICSSG0 Industrial Ethernet Digital I/O Data Input/Output AA5 U1 PRG0_IEP0_EDIO_DATA_IN_OUT30 IO PRU_ICSSG0 Industrial Ethernet (IEP0) Digital I/O Data Input/Output Y5 R2 PRG0_IEP0_EDIO_DATA_IN_OUT31 IO PRU_ICSSG0 Industrial Ethernet Digital I/O Data Input/Output V6 U2 PRG0_IEP1_EDC_LATCH_IN0 I PRU_ICSSG0 Industrial Ethernet (IEP1) Distributed Clock Latch Input 0 P5 D1 PRG0_IEP1_EDC_LATCH_IN1 I PRU_ICSSG0 Industrial Ethernet (IEP1) Distributed Clock Latch Input 1 W5 T5 PRG0_IEP1_EDC_SYNC_OUT0 O PRU_ICSSG0 Industrial Ethernet (IEP1) Distributed Clock Sync Output 0 R2 F3 PRG0_IEP1_EDC_SYNC_OUT1 O PRU_ICSSG0 Industrial Ethernet (IEP1) Distributed Clock Sync Output 1 V5 T1 PRG0_MDIO0_MDC O PRU_ICSSG0 MDIO Clock P3 D2 PRG0_MDIO0_MDIO IO PRU_ICSSG0 MDIO0 Data P2 E4 PRG0_PRU0_GPI0 I PRU_ICSSG0 PRU Data Input Y1 J3 PRG0_PRU0_GPI1 I PRU_ICSSG0 PRU Data Input R4 J4 PRG0_PRU0_GPI2 I PRU_ICSSG0 PRU Data Input U2 G1 PRG0_PRU0_GPI3 I PRU_ICSSG0 PRU Data Input V2 H1 PRG0_PRU0_GPI4 I PRU_ICSSG0 PRU Data Input AA2 K2 PRG0_PRU0_GPI5 I PRU_ICSSG0 PRU Data Input R3 F2 PRG0_PRU0_GPI6 I PRU_ICSSG0 PRU Data Input T3 H2 PRG0_PRU0_GPI7 I PRU_ICSSG0 PRU Data Input T1 E2 PRG0_PRU0_GPI8 I PRU_ICSSG0 PRU Data Input T2 H5 PRG0_PRU0_GPI9 I PRU_ICSSG0 PRU Data Input W6 Y3 PRG0_PRU0_GPI10 I PRU_ICSSG0 PRU Data Input AA5 U1 PRG0_PRU0_GPI11 I PRU_ICSSG0 PRU Data Input Y3 L1 PRG0_PRU0_GPI12 I PRU_ICSSG0 PRU Data Input AA3 K1 PRG0_PRU0_GPI13 I PRU_ICSSG0 PRU Data Input R6 N1 PRG0_PRU0_GPI14 I PRU_ICSSG0 PRU Data Input V4 N2 PRG0_PRU0_GPI15 I PRU_ICSSG0 PRU Data Input T5 N4 PRG0_PRU0_GPI16 I PRU_ICSSG0 PRU Data Input U4 N3 www.ti.com AM2434, AM2432, AM2431 SPRSP65J – APRIL 2021 – REVISED JUNE 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 83 Product Folder Links: AM2434 AM2432 AM2431 |
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