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RZ/N2L Datasheet(PDF) 126 Page - Renesas Technology Corp

Part # RZ/N2L
Description  RZ Arm-based High-end 32 & 64-bit MPUs
PDF  128 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RZ/N2L Datasheet(HTML) 126 Page - Renesas Technology Corp

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Revision History
Revision 1.00 — June 10, 2022
● Initial release
Revision 1.10 — July 29, 2022
2. Electrical Characteristics:
● Corrected Table 2.21 Bus timing [Conditions: VOH = VCC33 × 0.5, VOL = VCC33 × 0.5, C = 15 pF (CKIO), 30 pF (others), Tjmin =
−40°C].
● Corrected Table 2.22 Bus timing [Conditions: VOH = VCC33 × 0.5, VOL = VCC33 × 0.5, C = 12 pF (CKIO), 12 pF (others), Tjmin =
−20°C].
Revision 1.20 — September 30, 2022
1. Overview:
● Corrected Table 1.3 System.
● Corrected Table 1.15 Others.
2. Electrical Characteristics:
● Corrected Figure 2.10 Mode input timing.
● Corrected Table 2.33 IIC timing.
Revision 1.30 — October 31, 2023
1. Overview:
● Updated Table 1.7 Timers.
2. Electrical Characteristics:
● Updated Table 2.35 SPI timing.
● Updated Table 2.40 Serial management interface timing.
Revision 1.40 — March 31, 2026
Features:
● Updated On-chip 32-bit Arm Cortex-R52 processor
1. Overview:
● Updated Table 1.1 CPU
● Updated Table 1.12 Security
● Updated Table 1.17 Product Lineup
2. Electrical Characteristics:
● Updated Table 2.1 Absolute maximum ratings
● Updated Table 2.2 Power supply
● Updated 2.3 Power On/Off Sequence
● Updated Table 2.3 Power on/off sequence timing
● Figure 2.1 Power on/off sequence
● Updated Table 2.16 Ethernet PHY reference clock output timing
● Updated Table 2.20 Reset, interrupt, and mode timing
● Updated Table 2.23 DMAC timing
● Updated Table 2.24 DMAC timing
● Updated Table 2.32 SCI timing
● Updated Table 2.36 xSPI timing
● Updated Figure 2.77 DS to CS signal timing
● Updated Table 2.37 ΔΣ interface timing
● Updated Table 2.38 Ethernet interface timing
RZ/N2L Datasheet
Revision History
R01DS0397EJ0140 Rev.1.40
Mar 31, 2026
Page 126 of 128



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