IDT™ / ICS™ LVPECL FANOUT BUFFER

7

ICS853S12AKI REV. A MAY 21, 2008

ICS853S12I

LOW SKEW, 1-TO-12, DIFFERENTIAL-TO-3.3V, 2.5V LVPECL FANOUT BUFFER

APPLICATION INFORMATION

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS

Figure 1 shows how the differential input can be wired to accept

single ended levels. The reference voltage V_REF = V

CC

/2 is

generated by the bias resistors R1, R2 and C1. This bias circuit

should be located as close as possible to the input pin. The ratio

FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT

of R1 and R2 might need to be adjusted to position the V_REF in

the center of the input voltage swing. For example, if the input

clock swing is only 2.5V and V

CC

= 3.3V, V_REF should be 1.25V

and R2/R1 = 0.609.

OUTPUTS:

LVPECL OUTPUTS:

All unused LVPECL outputs can be left floating. We recommend

that there is no trace attached. Both sides of the differential output

pair should either be left floating or terminated.

RECOMMENDATIONS FOR UNUSED OUTPUT PINS

Single Ended Clock Input

VCC

PCLK

nPCLK

R1

C1

0.1u

R2

1K

1K

V_REF