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AT80SND1C-ROTIL Datasheet(PDF) 157 Page - ATMEL Corporation |
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AT80SND1C-ROTIL Datasheet(HTML) 157 Page - ATMEL Corporation |
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157 / 210 page ![]() 157 AT8xC51SND1C 4109E–8051–06/03 Table 133. SPSTA Register SPSTA (S:C4h) – SPI Status Register Reset Value = 00000 0000b Table 134. SPDAT Register SPDAT (S:C5h) – Synchronous Serial Data Register Reset Value = XXXX XXXXb 7654 3210 SPIF WCOL - MODF ---- Bit Number Bit Mnemonic Description 7SPIF SPI Interrupt Flag Set by hardware when an 8-bit shift is completed. Cleared by hardware when reading or writing SPDAT after reading SPSTA. 6WCOL Write Collision Flag Set by hardware to indicate that a collision has been detected. Cleared by hardware to indicate that no collision has been detected. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4MODF Mode Fault Set by hardware to indicate that the SS pin is at an appropriate level. Cleared by hardware to indicate that the SS pin is at an inappropriate level. 3 - 0 - Reserved The value read from these bits is indeterminate. Do not set these bits. 7654 3210 SPD7 SPD6SPD5SPD4SPD3SPD2SPD1 SPD0 Bit Number Bit Mnemonic Description 7 - 0 SPD7:0 Synchronous Serial Data. |
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