LD39150

Application information

11/27

5.4

Byte format

Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an

acknowledge bit. The MSB is transferred first.

5.5

Acknowledge

The master (µP) puts a resistive HIGH level on the SDA line during the acknowledge clock

pulse (see Figure 7.). The peripheral (LNBH221) that acknowledges has to pull-down

(LOW) the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW

during this clock pulse. The peripheral which has been addressed has to generate an

acknowledge after the reception of each byte, otherwise the SDA line remains at the HIGH

level during the ninth clock pulse time. In this case the master transmitter can generate the

STOP information in order to abort the transfer. The LNBH221 won't generate the

5.6

Transmission without acknowledgement

Avoiding to detect the acknowledge of the LNBH221, the µP can use a simpler

transmission: simply it waits one clock without checking the slave acknowledging, and

sends the new data.

This approach of course is less protected from misworking and decreases the noise

immunity..

Figure 5.