LFSC datasheet(73/237 Pages) LATTICE

73 / 237 page

3-29

DC and Switching Characteristics

Lattice Semiconductor

LatticeSC/M Family Data Sheet

JTAG Port Timing Speciﬁcations

Over Recommended Operating Conditions

Figure 3-14. JTAG Port Timing Waveforms

Symbol

Parameter

Min.

Max.

Units

fMAX

—

MHz

tBTCP

TCK [BSCAN] Clock Pulse Width

—

tBTCPH

TCK [BSCAN] Clock Pulse Width High

—

mV/ns

tBTCPL

TCK [BSCAN] Clock Pulse Width Low

—

tBTS

TCK [BSCAN] Setup Time

—

tBTH

TCK [BSCAN] Hold Time

—

tBTRF

TCK [BSCAN] Rise/Fall Time

—

tBTCO

TAP Controller Falling Edge of Clock to Valid Output

—

tBTCODIS

TAP Controller Falling Edge of Clock to Valid Disable

—

tBTCOEN

TAP Controller Falling Edge of Clock to Valid Enable

—

tBTCRS

BSCAN Test Capture Register Setup Time

—

tBTCRH

BSCAN Test Capture Register Hold Time

—

tBUTCO

BSCAN Test Update Register, Falling Edge of Clock

to Valid Output

—25

tBTUODIS

BSCAN Test Update Register, Falling Edge of Clock

to Valid Disable

—25

tBTUPOEN

BSCAN Test Update Register, Falling Edge of Clock

to Valid Enable

—25

TMS

TDI

TCK

TDO

Data to be

captured

from I/O

Data to be

driven out

to I/O

Data Captured

tBTCPH

tBTCPL

tBTCOEN

tBTCRS

tBTUPOEN

tBUTCO

tBTUODIS

tBTCRH

tBTCO

tBTCODIS

tBTS

tBTH

tBTCP

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