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HD404849FS Datasheet(PDF) 34 Page - Renesas Technology Corp |
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HD404849FS Datasheet(HTML) 34 Page - Renesas Technology Corp |
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34 / 127 page  HD404849 Series 32 Standby Oscillator: Active Peripheral clocks: Active All other clocks: Stop No Yes No Yes No Yes No Yes No Yes No Yes Yes (SBY only) Watch Oscillator: Stop Suboscillator: Active Peripheral clocks: Stop All other clocks: Stop Restart processor clocks Reset MCU Execute next instruction Accept interrupt Restart processor clocks No Yes IF = 1, IM = 0, and IE = 1? IF0 • IM0 = 1? IF1 • IM1 = 1? IFTA • IMTA = 1? IFTB • IMTB + IF2 • IM2 = 1? IFTC • IMTC + IF3 • IM3 = 1? IFTD • IMTD = 1? No Yes IFAD • IMAD + IFS • IMS = 1? No Stop Oscillator: Stop Suboscillator: Active/Stop Peripheral clocks: Stop All other clocks: Stop RESET = 0? STOPC = 0? RAME = 1 RAME = 0 Yes Yes No No Execute next instruction (SBY only) (SBY only) (SBY only) (SBY only) RESET = 0? Figure 15 MCU Operation Flowchart Stop Mode: In stop mode, all MCU operations stop and RAM data is retained. Therefore, the power dissipation in this mode is the least of all modes. The OSC 1 and OSC2 oscillator stops. The X1 and X2 oscillator can be selected to operate by setting bit 3 of the system clock select register (SSR: $029; operating: SSR3 = 0, stop: SSR3 = 1) (figure 26). The MCU enters stop mode if the STOP instruction is executed in active mode when bit 3 of timer mode register A (TMA: $008) is set to 0 (TMA3 = 0) (figure 41). Stop mode is terminated by a RESET input or a STOPC input as shown in figure 16. RESET or STOPC must be applied for at least one t RC to stabilize oscillation (refer to the AC Characteristics section). When the MCU restarts after stop mode is cancelled, all RAM contents before entering stop mode are retained, |
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