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HD404849FS Datasheet(PDF) 69 Page - Renesas Technology Corp |
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HD404849FS Datasheet(HTML) 69 Page - Renesas Technology Corp |
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69 / 127 page ![]() HD404849 Series 67 Writing to this register is valid from the second instruction execution cycle after the execution of the previous timer mode register C1 write instruction. A timer C initialization by writing to timer write register C (TWCL: $00E, TWCU: $00F) must be programmed to occur after a mode change becomes valid. Bit Initial value Read/Write Bit name 3 0 W TMC13 2 0 W TMC12 0 0 W TMC10 1 0 W TMC11 Timer mode register C1 (TMC1: $00D) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 2048tcyc 1024tcyc 512tcyc 128tcyc 32tcyc 8tcyc 4tcyc 2tcyc TMC12 TMC10 TMC11 TMC13 0 1 Free-running/reload timer selection Free-running timer Reload timer Input clock period Figure 52 Timer Mode Register C1 (TMC1) • Timer mode register C2 (TMC2: $014): Three-bit read/write register that selects the timer C output mode as shown in figure 53. It is reset to $0 by MCU reset. |
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