7480 datasheet(47/98 Pages) RENESAS

47 / 98 page

MITSUBISHI MICROCOMPUTERS

7480/7481 GROUP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

PRELIMINAR

Notice:

This

is not

a final

specification.

Some

parametric

limits

are

subject

to change.

BUILT-IN PROGRAMMABLE ROM VERSIONS

M37480E8-XXXSP/FP, M37480E8T-XXXSP/FP, M37481E8-XXXSP/FP, M37481E8T-XXXSP/FP,

M37481E8SS

PIN DESCRIPTION

Table 5. Pin description

VCC, VSS

AVSS

(Note 1)

VREF

_____

RESET

P00 – P07

P10 – P17

P20 – P27

(Note 2)

P30 – P33

P40 – P43

(Note 3)

P50 – P53

(Note 4)

Single-chip/

EPROM

Single-chip

EPROM

Single-chip

EPROM

Single-chip

EPROM

Single-chip

EPROM

Single-chip

EPROM

Single-chip

EPROM

Single-chip

EPROM

Single-chip

EPROM

Power source

Reference power

input

Mode input

Reset input

I/O port P0

Data I/O D0 – D7

I/O port P1

Address input

A4 – A10

Input port P2

Address input

A0 – A3

Input port P3

Address input

A11, A12, mode

input, VPP input

I/O port P4

Address input

A13, A14

I/O port P5

Input port P5

Apply a voltage of 2.7 to 5.5 V to VCC and 0 V to VSS and AVSS.

Reference voltage input pin for A-D converter.

Used as CE input pin.

Reset input pin.

Connect to VSS.

These are I/O pins of internal clock generating circuit for the main

clock. To control generating frequency, an external ceramic resona-

tor is connected between XIN and XOUT pins. If an external clock is

used, the clock oscillation source should be connected to the XIN

pin, and the XOUT pin should be left open. Feedback resistor is con-

nected between XIN and XOUT.

8-bit I/O port. The output structure is CMOS output.

When this port is selected for input, a pull-up transistor can be con-

nected in units of 1 bit, and a key-on wake-up function is provided.

Data 8-bit (D0 to D7) I/O pins

8-bit I/O port. The output structure is CMOS output.

When this port is selected for input, a pull-up transistor can be con-

nected in units of 4 bits. P12 and P13 are in common with timer

output pins T0 and T1. P14, P15, P16 and P17 are in common with

____

serial I/O pins RxD, TxD, SCLK and SRDY.

P11 to P17 are address (A4 to A10) input pins. Leave P10 open.

8-bit input port. This port is in common with analog input pins IN0 to

IN7 (IN0 to IN3 for the 7480 group).

P20 to P23 are address (A0 to A3) input pins. Leave P24 to P27

open.

4-bit input port. P30 and P31 are in common with external interrupt

input pins INT0 and INT1.

P30 and P31 are address (A11, A12) input pins. P32 is used for OE

input. P33 is VPP input. Apply VPP in the program and program

verify modes.

4-bit I/O port. The output structure is N-channel open drain output,

having built-in clamp diode. P40 and P41 are in common with timer

input pins CNTR0 and CNTR1.

P40 and P41 are address (A13, A14) input pins. Leave P42 and P43

open.

4-bit I/O port. The output structure is N-channel open drain output,

having a built-in clamp diode.

Leave these pins open.

Clock input

Clock output

Single-chip/

EPROM

Single-chip/

EPROM

XIN

XOUT

Notes 1 : This is a dedicated pin for the 44P6N-A package in the 7481 group.

2 : Only 4 bits of P20 to P23 (IN0 to IN3) for the 7480 group.

3 : Only 2 bits of P40 and P41 for the 7480 group.

4 : This is a dedicated pin for the 7481 group.

Input

I/O

Input

I/O

Input

I/O

Input

Output

Function

Name

Input/

output

Mode

7480 Datasheet(PDF) 47 Page - Renesas Technology Corp

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