HD6432351 datasheet(890/1025 Pages) RENESAS

890 / 1025 page

Appendix B Internal I/O Register

Rev. 3.00 Sep 15, 2006 page 856 of 988

REJ09B0330-0300

DMAWER—DMA Write Enable Register

H'FF00

DMAC

—

WE1B

R/W

WE0A

R/W

WE1A

R/W

WE0B

R/W

Bit

DMAWER

Initial value

Read/Write

Write Enable 1B

Write Enable 1A

Writes to all bits in DMACR0A,

and bits 8, 4, and 0 in DMABCR

are disabled

Write Enable 0A

Write Enable 0B

Writes to all bits in DMACR0A,

and bits 8, 4, and 0 in DMABCR

are enabled

Writes to all bits in DMACR0B, bits 9,

5, and 1 in DMABCR, and bit 4 in

DMATCR are disabled

Writes to all bits in DMACR0B, bits 9,

5, and 1 in DMABCR, and bit 4 in

DMATCR are enabled

Writes to all bits in DMACR1A, and bits

10, 6, and 2 in DMABCR are disabled

Writes to all bits in DMACR1A, and bits

10, 6, and 2 in DMABCR are enabled

Writes to all bits in DMACR1B, bits 11, 7, and 3 in

DMABCR, and bit 5 in DMATCR are disabled

Writes to all bits in DMACR1B, bits 11, 7, and 3 in

DMABCR, and bit 5 in DMATCR are enabled

HD6432351 Datasheet(PDF) 890 Page - Renesas Technology Corp

HD6432351 Datasheet(HTML) 890 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL