HD6432147SW datasheet(160/1177 Pages) RENESAS

160 / 1177 page

Section 5 Interrupt Controller

Rev. 4.00 Sep 27, 2006 page 116 of 1130

REJ09B0327-0400

5.1.4

Table 5.2 summarizes the registers of the interrupt controller.

Table 5.2

Interrupt Controller Registers

Name

Abbreviation

R/W

Initial Value

Address*

System control register

SYSCR

R/W

H'09

H'FFC4

IRQ sense control register H

ISCRH

R/W

H'00

H'FEEC

IRQ sense control register L

ISCRL

R/W

H'00

H'FEED

IRQ enable register

IER

R/W

H'00

H'FFC2

IRQ status register

ISR

R/(W)*

H'00

H'FEEB

Keyboard matrix interrupt mask

KMIMR

R/W

H'BF

H'FFF1*

Keyboard matrix interrupt mask

KMIMRA

R/W

H'FF

H'FFF3*

Interrupt control register A

ICRA

R/W

H'00

H'FEE8

Interrupt control register B

ICRB

R/W

H'00

H'FEE9

Interrupt control register C

ICRC

R/W

H'00

H'FEEA

Address break control register

ABRKCR

R/W

H'00

H'FEF4

Break address register A

BARA

R/W

H'00

H'FEF5

Break address register B

BARB

R/W

H'00

H'FEF6

Break address register C

BARC

R/W

H'00

H'FEF7

Notes: 1. Lower 16 bits of the address.

2. Only 0 can be written, for flag clearing.

3. When setting KMIMR and KMIMRA, the HIE bit in SYSCR must be set to 1, and also

MSTP2 bit in MSTPCRL must be set to 0.

HD6432147SW Datasheet(PDF) 160 Page - Renesas Technology Corp

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