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HD6432142 Datasheet(PDF) 638 Page - Renesas Technology Corp |
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HD6432142 Datasheet(HTML) 638 Page - Renesas Technology Corp |
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638 / 1177 page  Section 18 Host Interface Rev. 4.00 Sep 27, 2006 page 594 of 1130 REJ09B0327-0400 Bit 0—Output Buffer Full (OBF): Set to 1 when the slave processor writes to ODR1. Cleared to 0 when the host processor reads ODR. Bit 0 OBF Description 0 [Clearing condition] When the host processor reads ODR or the slave writes 0 in the OBF bit (Initial value) 1 [Setting condition] When the slave processor writes to ODR Table 18.3 shows the conditions for setting and clearing the STR flags. Table 18.3 Set/Clear Timing for STR Flags Flag Setting Condition Clearing Condition C/ D Rising edge of host’s write signal ( IOW) when HA0 is high Rising edge of host’s write signal ( IOW) when HA0 is low IBF* Rising edge of host’s write signal ( IOW) when writing to IDR1 Falling edge of slave’s internal read signal ( RD) when reading IDR1 OBF Falling edge of slave’s internal write signal ( WR) when writing to ODR1 Rising edge of host’s read signal ( IOR) when reading ODR1 Note: * The IBF flag setting and clearing conditions are different when the fast A20 gate is used. For details see table 18.7. |
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