TVP70025IPZP datasheet(22/55 Pages) TI

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Timing

RGBin

HSYNC

DATACLK

RGBout

...

P10

P11

P12

HSOUT

Programmable Width

NPD clocks latency

HSOUT Programmable Start

4:4:4 RGB/YCbCr Output Timing. Npd = 18 clock cycles. HSOUT start is programmable in register 21h.

RGBin

HSYNC

DATACLK

Gout

...

P10

P11

P12

HSOUT

Programmable Width

NPD clocks latency

Bout

HSOUT Programmable Start

4:2:2 YCbCr Output Timing. Npd = 39 clock cycles. HSOUT start is programmable in register 21h.

TVP70025I

SLES232 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com

The TVP70025I supports RGB/YCbCr 4:4:4 and YCbCr 4:2:2 modes. Output timing is shown in Figure 6. All

timing diagrams are shown for operation with internal PLL clock at phase 0 and HSOUT Output Start = 0. For the

4:2:2 mode, CbCr data output is on the BOUT[9:0] output port.

Figure 6. Output Timing Diagram

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TVP70025IPZP Datasheet(PDF) 22 Page - Texas Instruments

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