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TDF8599TH Datasheet(PDF) 24 Page - NXP Semiconductors |
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TDF8599TH Datasheet(HTML) 24 Page - NXP Semiconductors |
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24 / 52 page ![]() TDF8599_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 13 November 2008 24 of 52 NXP Semiconductors TDF8599 Class-D power amplifier with load diagnostics (1) When SDL is HIGH, SDA changes to form the start or stop condition. (1) SDA is allowed to change. (2) All data bits must be valid on the positive edges of the SCL. Fig 23. I2C-bus start and stop conditions Fig 24. Data bits sent from Master microprocessor (M µp) STOP START 001aai792 SCL SDA M µp SLAVE (1) SCL SDA 001aai793 (2) (1) M µp SLAVE (1) To stop the transfer after the last acknowledge a stop condition must be generated. Fig 25. I2C-bus write 001aai794 LSB+1 LSB+1 LSB MSB −1 MSB MSB −1 MSB ACK ACK ACK(1) ACK STOP WRITE DATA WRITE START ADDRESS 12 7 8 9 7 8 9 12 SCL SDA M µp SLAVE (1) To stop the transfer, the last byte must not be acknowledged (SDA is HIGH) and a stop condition must be generated. Fig 26. I2C-bus read 001aai795 LSB+1 LSB+1 LSB MSB −1 MSB MSB −1 MSB ACK ACK(1) ACKNOWLEDGE STOP READ DATA READ START ADDRESS 12 7 8 9 7 8 9 12 SCL SDA M µp SLAVE |
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