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TDF8599TH Datasheet(PDF) 14 Page - NXP Semiconductors |
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TDF8599TH Datasheet(HTML) 14 Page - NXP Semiconductors |
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14 / 52 page ![]() TDF8599_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 13 November 2008 14 of 52 NXP Semiconductors TDF8599 Class-D power amplifier with load diagnostics 8.4.3 Parallel mode In Parallel mode; the two output stages operate in parallel to enlarge the drive capability. The inputs and outputs for Parallel mode must be connected on the Printed-Circuit Board (PCB) as shown in Figure 14. The parallel connection can be made after the output filter, as shown in Figure 14 or directly to the device output pins. In Parallel mode, the channel 1 I2C-bus bits can be programmed using the I2C-bus. However, clip detection must be deactivated by disabling clip detection for both channel 1 and channel 2. Fig 13. Master and slave operation with 1 ⁄2 π phase shift. 001aai783 OUT1P phase 0 π 1/2 π 3/2 π OUT1N OUT2P OUT2N OUT1P OUT1N OUT2P master slave OUT2N Fig 14. Mono and Parallel modes 001aai784 IN1P MOD RMOD IN2N IN1N OUT1N OUT2N OUT1P OUT2P + − − + IN2P TDF8599 |
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