TDF8599TH datasheet(26/52 Pages) NXP

26 / 52 page

TDF8599_1

Product data sheet

Rev. 01 — 13 November 2008

26 of 52

NXP Semiconductors

TDF8599

Class-D power ampliﬁer with load diagnostics

9.2 Data bytes

If R/W = 1, the TDF8599 sends two data bytes to the microprocessor (DB1 and DB2). All

short diagnostic and offset protection bits are latched. In addition, all bits are reset after a

read operation except the DC load detection bits (DBx[D4], DB1[D6]). The default setting

for all bits is logic 0.

In Parallel mode, the diagnostic information is stored in byte DB1.

Data byte DB1[D7] indicates whether the instruction bits have been set to logic 0. In

principle, DB1[D7] is set after a POR or when all the instruction bits are programmed to

logic 0. Pin DIAG is activated when bit IB1[D7] = 1.

Table 16.

Description of data bytes

Bit

Value

DB1 channel 1

DB2 channel 2

at least 1 instruction bit set to logic 1

below maximum temperature

all instruction bits are set to logic 0

maximum temperature protection

activated

invalid DC load data

no temperature warning

valid DC load data

temperature pre-warning active

no overvoltage

no undervoltage

overvoltage protection active

undervoltage protection active

speaker load channel 1

speaker load channel 2

open load channel 1

open load channel

no shorted load

shorted load channel 1

shorted load channel 2

no offset

reserved

offset detected

reserved

no short to Vp channel 1

no short to Vp channel 2

short to Vp channel 1

short to Vp channel 2

no short to ground channel 1

no short to ground channel 2

short to ground channel 1

short to ground channel 2

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