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MC33596FCE/R2 Datasheet(PDF) 40 Page - Freescale Semiconductor, Inc |
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MC33596FCE/R2 Datasheet(HTML) 40 Page - Freescale Semiconductor, Inc |
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40 / 70 page ![]() MC33596 Data Sheet, Rev. 4 Register Description Freescale Semiconductor 40 BANKA defines the register bank selected, as described in Section 15, “Configuration Switching.” RON[3:0] (Receiver On) define the receiver on time (after crystal oscillator startup) as described in Section 11.3, “Receiver On/Off Control.” ROFF[2:0] (Receiver Off) define the receiver off time as described in Section 11.3, “Receiver On/Off Control.” 16.5 ID and Header Registers Figure 30 defines the ID register, ID. IDL[1:0] (Identifier Length) sets the length of the identifier, as shown on Table 18. Table 16. Receiver On Time Definition RON[3:0] Receiver On Time: N x 512 x Tdigclk 0000 Forbidden value 0001 1 0010 2 ... ... 1111 15 Table 17. Receiver Off Time Definition ROFF[2:0] Receiver Off Time: N x TStrobe 000 1 001 2 010 4 011 8 100 12 101 16 110 32 111 63 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Addr Bit Name IDL1 IDL0 ID5 ID4 ID3 ID2 ID1 ID0 $0A Reset Value 1 1 0 0 0 0 0 0 Access R/WR/W R/WR/W R/WR/W R/W R/W Figure 30. ID Register |
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