13892 datasheet(45/75 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

13892

FUNCTIONAL DESCRIPTION

FUNCTIONAL PIN DESCRIPTION

Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not

available from Freescale for import or sale in the United States prior to September 2010: MC13892VK and MC13892VL in 139, 186 MAPBGA packages.

MODE

USB LBP mode, normal mode, test mode selection & anti-

fuse bias. During evaluation and testing, the IC can be

configured for normal operation or test mode via the MODE

pin as summarized in the following table.

GNDCTRL

Ground for control logic.

SPIVCC

Supply for SPI bus and audio bus

CS held low at Cold Start configures the interface for SPI

mode. Once activated, CS functions as the SPI Chip Select.

CS tied to VCORE at Cold Start configures the interface for

I2C mode; the pin is not used in I2C mode other than for

configuration.

Because the SPI interface pins can be reconfigured for

reuse as an I2C interface, a configuration protocol mandates

that the CS pin is held low during a turn on event for the IC (a

weak pull-down is integrated on the CS pin).

CLK

Primary SPI clock input. In I2C mode, this pin is the SCL

signal (I2C bus clock).

MOSI

Primary SPI write input. In I2C mode, the MOSI pin hard

wired to ground or VCORE is used to select between two

possible addresses (A0 address selection).

MISO

Primary SPI read output. In I2C mode, this pin is the SDA

signal (bi-directional serial data line).

GNDSPI

Ground for SPI interface.

Table 10. Power Up Sequence

Tap x 2.0 ms

PUMS2 = OPEN (I,MX37,i.MX51)

PUMS2 = GND (i.MX35,i.MX27)

SW2

SW4

VGEN2

VIOHI

SW4

VGEN2

VIOHI, VSD

SW1

SWBST, VUSB(50)

SW3

SW1

VPLL

VDIG

SW3

VDIG

VUSB(49), VUSB2

VUSB2

Notes

47.

Time slots may be included for blocks which are defined by the PUMS pins as disabled, to allow for potential activation.

48.

The following supplies are not included in the matrix, since they are not intended for activation by the start-up sequencer: VCAM,

VGEN1, VGEN3, VVIDEO, and VAUDIO. SWBST is not included on the PUMS2 = Open column

49.

USB supplies VUSB, is only enabled if 5.0 V is present on UVBUS.

50.

SWBST = 5.0 V, powers up, as does VUSB, regardless of the 5.0 V present on UVBUS. By default VUSB will be supplied by SWBST.

MODE PIN STATE

MODE

Ground

Normal Operation

VCOREDIG

USB Low Power Boot Allowed

VCORE

Test Mode

13892 Datasheet(PDF) 45 Page - Freescale Semiconductor, Inc

13892 Datasheet(HTML) 45 Page - Freescale Semiconductor, Inc

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